Other Parts Discussed in Thread: CC2340R5
Tool/software:
Hi, TI Team.
Please provide information on the operation of both the I2C controller and the target regarding the following:
Q1) Is the level operation of SCL and SDA necessary for bus communication, including ACK/NACK checking and the generation of start/stop conditions in I2C communication, controlled by hardware or software?
Q2) Does it support clock stretching functionality?
Q3) What happens when there is a timing conflict with the BLE task?
Best Regards.