Part Number: CC2651R3SIPA
Tool/software:
We will use a 32kHz input from an external oscillator and a reset input from an external reset IC as follows.

In our current power-up sequence, we ramp up VCCS to 2.5V and then release the reset. After that, the 32kHz clock signal becomes stable.
Is there any problem with this clock stabilization sequence?
Or should the 32kHz clock input be stable before releasing the reset?