Part Number: CC2340R5
Other Parts Discussed in Thread: SYSCONFIG
Hello,
We are using CC2340R52E0RGER with the SimpleLink Low Power F3 SDK.
Our 48 MHz HFXT crystal circuit is implemented as shown below.
- Crystal: AR48010803, 48 MHz, CL = 12 pF, ±10 ppm
- External load capacitors: 10 pF on X48P and 10 pF on X48N
- The crystal case/GND pin is connected to ground.
Based on this hardware configuration, we configured SysConfig as follows:
- Low Frequency Clock Source: LF XOSC
- Use External HFXT Capacitors: Enabled
- Override HFXT Cap Array Trims: Disabled
Could you confirm whether this is the correct SysConfig setting when external load capacitors are populated on the PCB?
Also, in this configuration, is the internal HFXT cap-array completely disabled/ignored, or is there any additional trim value that still needs to be considered?
In addition, could you also explain what could happen if both options are disabled with this same hardware configuration?
- Use External HFXT Capacitors: Disabled
- Override HFXT Cap Array Trims: Disabled
For example, if external 10 pF load capacitors are populated but this setting is used, will the internal HFXT cap-array still be applied with its default trim value, resulting in additional load capacitance? Could this cause HFXT frequency error, BLE RF frequency offset, connection stability issues, or RF/SIG test failures?
Thank you.
