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Porting Bluetopia SPP stack to MSP430F5528 from MSP430F5529

Other Parts Discussed in Thread: MSP430F5528, MSP430F5529

Hi,


Now I am in the process of porting the code to the MSP4305528 from the MS430f5529 used on an EXP430f5529 experimenter board. I just modified the HAL.c and HRDWCFG.h to reflect the different GPIO pinout Rx/Tx/Cts/Rts/Clock/Sht_down_n connections to the PAN1325A on my MSP430f5528 board design. After re-compiling and loading the code on the MSP430F5528, I can't see any TX activity on the designated GPIO connected to the PAN1325. If anyone has done porting to a different processor on this design, let me know which files other than HRDWCFG.h and HAL.c  need modifications.

Thanks,

Armen.

  • Hello Armen,

    We already have a demo on the MSP430F5529. Which profile are you using? Have you tried SPPLE Demo Lite: http://processors.wiki.ti.com/index.php/CC256x_MSP430_Bluetopia_Basic_Demo_APPS

     

  • Hi Zahid,

    I have a demo SPPLE Demo Lite profile running okay on the MSP430F5529. I want to go to MSP430F5528 the pins are different.

    I have:

    P3-3 for Rx

    P3-4 for TX

    P1-3 for CTS

    P1-2 for RTS

    P1-1 for Shdwown_n

    P1-0 for clock

    I modified the HRDWCFG.h to define the new pinouts in my design.

    See below part of the HRDWCFG.h file:

    .....

    /******************************************************************************/
    /** The following defines control the UART module used for debug logs. **/
    /******************************************************************************/

    /* The DEBUG UART port base. Should be set to the address of the */
    /* UCA1. */
    // Armen #define BT_DEBUG_UART_BASE ((unsigned int)&UCA3CTLW0)
    #define BT_DEBUG_UART_BASE ((unsigned int)&UCA1CTLW0)

    /* The DEBUG UART Port Interrupt Vector Number. Used when enable */
    /* reception of data on the DEBUG UART port. */
    //Armen #define BT_DEBUG_UART_IV (USCI_A3_VECTOR)
    #define BT_DEBUG_UART_IV (USCI_A1_VECTOR)

    /* The Bluetooth UART Interrupt Vector Register. */
    //Armen #define BT_DEBUG_UART_IVR (UCA3IV)
    #define BT_DEBUG_UART_IVR (UCA1IV)

    /* Maximum numbered of buffered characters on the DEBUG UART */
    /* receiver. */
    #define BT_DEBUG_UART_RX_BUFFER_SIZE 64

    /* Maximum numbered of buffered characters on the DEBUG UART */
    /* transmitter. */
    /* * NOTE * If this value is 0 then this will generate to a Blocking */
    /* Write. */
    #define BT_DEBUG_UART_TX_BUFFER_SIZE (3*80)

    /* The DEBUG UART I/O Pin Base. Should be set to the address of the */
    /* Input register of the I/O Port where the desired UART's Tx/Rx pins*/
    /* are located. */
    //Armen #define BT_DEBUG_UART_PIN_BASE (&P10IN)
    #define BT_DEBUG_UART_PIN_BASE (&P4IN)

    /* The DEBUG UART's Tx Pin Mask. This should be set to BITx where x */
    /* is the pin on the BT_DEBUG_UART_PIN_BASE port. */
    // Armen #define BT_DEBUG_UART_PIN_TX_MASK (BIT4)
    #define BT_DEBUG_UART_PIN_TX_MASK (BIT4)

    /* The DEBUG UART's Rx Pin Mask. This should be set to BITx where x */
    /* is the pin on the BT_DEBUG_UART_PIN_BASE port. */
    //Armen #define BT_DEBUG_UART_PIN_RX_MASK (BIT5)
    #define BT_DEBUG_UART_PIN_RX_MASK (BIT5)

    /* The DEBUG UART Baudrate, must be in range supported by chip. */
    #define BT_DEBUG_UART_BAUDRATE 9600L

    /******************************************************************************/
    /** The following defines control the Bluetooth Slow Clock Line. **/
    /******************************************************************************/

    /* The following is the base address of the GPIO Port where the BT */
    /* Slow Clock line is located. */
    //Armen #define BT_SLOW_CLOCK_PORT_BASE ((unsigned int)&P2IN)
    #define BT_SLOW_CLOCK_PORT_BASE ((unsigned int)&P1IN)

    /* The following is the pin number on BT_SLOW_CLOCK_PORT_BASE which */
    /* for which the controller's slow clock line is located. */
    //Armen #define BT_SLOW_CLOCK_PORT_PIN (BIT6)
    #define BT_SLOW_CLOCK_PORT_PIN (BIT0)

    /******************************************************************************/
    /** The following defines control the Bluetooth HCI UART Reset Line. **/
    /******************************************************************************/

    /* The following is the base address of the GPIO Port where the BT */
    /* controlller's reset line is located. */
    //Armen #define BT_DEVICE_RESET_PORT_BASE ((unsigned int)&P7IN)
    #define BT_DEVICE_RESET_PORT_BASE ((unsigned int)&P1IN)


    /* The following is the pin number on BT_DEVICE_RESET_PORT which for */
    /* which the controller's reset line is located. */
    //Armen #define BT_DEVICE_RESET_PORT_PIN (BIT5)
    #define BT_DEVICE_RESET_PORT_PIN (BIT1)

    /******************************************************************************/
    /** The following defines control the Bluetooth HCI UART RTS/CTS Lines. **/
    /******************************************************************************/

    /* The base address of the Processor Port on which the RTS Pin is */
    /* located. */
    //# Armen define BT_UART_FLOW_RTS_PIN_BASE ((unsigned int)&P2IN
    #define BT_UART_FLOW_RTS_PIN_BASE ((unsigned int)&P1IN)

    /* The base address of the Processor Port on which the CTS Pin is */
    /* located. */
    // Armen #define BT_UART_FLOW_CTS_PIN_BASE ((unsigned int)&P2IN)
    #define BT_UART_FLOW_CTS_PIN_BASE ((unsigned int)&P1IN)

    /* The following is the interrupt vector offset of the RTS/CTS Port. */
    //Armen #define BT_UART_CTS_IV (PORT2_VECTOR)
    #define BT_UART_CTS_IV (PORT1_VECTOR)

    /* The following is the UART RTS/CTS Interrupt Vector Register. */
    //Armen #define BT_UART_CTS_IVR (P2IV)
    #define BT_UART_CTS_IVR (P1IV)

    /* The Bluetooth RTS Output Port Pin Number. */
    // Armen #define BT_UART_RTS_PIN (BIT1)
    #define BT_UART_RTS_PIN (BIT2)

    /* The Bluetooth CTS Input Port Pin Number. */
    // Armen #define BT_UART_CTS_PIN (BIT4)
    #define BT_UART_CTS_PIN (BIT3)

    /* The Bluetooth CTS Interrupt Number. This should be in the form */
    /* PXIV_PXIFGY where X is the Port Number (1 in this case) and Y is */
    /* the Pin Number on the corresponding port (4 in this case). */
    //Armen #define BT_UART_CTS_INT_NUM (P2IV_P2IFG4)
    #define BT_UART_CTS_INT_NUM (P1IV_P1IFG3)

    /******************************************************************************/
    /** The following group of defines control the UART module used to talk to **/
    /** the Bluetooth Controller chip. **/
    /******************************************************************************/

    /* The Base Address of the used UART Module. On the MSP430x5xx */
    /* family this is set to the address of the Module's Control Word 0 */
    /* Register. (All other registers accessed are accessed based on */
    /* their offset from this Address Base). */
    //Armen #define BT_UART_MODULE_BASE ((unsigned int)&UCA2CTLW0)
    #define BT_UART_MODULE_BASE ((unsigned int)&UCA0CTLW0)

    /* The Bluetooth UART Interrupt Vector Offset. */
    //Armen #define BT_UART_IV (USCI_A2_VECTOR)
    #define BT_UART_IV (USCI_A0_VECTOR)

    /* The Bluetooth UART Interrupt Vector Register. */
    //Armen #define BT_UART_IVR (UCA2IV)
    #define BT_UART_IVR (UCA0IV)

    /* The following is the Base Address of the UART Module's Tx/Rx pin's*/
    /* Port base. This will be used to configure the Module's Tx/Rx to */
    /* be used as peripheral pins. */
    //Armen.#define BT_UART_PIN_PORT_BASE ((unsigned int)&P9IN)
    #define BT_UART_PIN_PORT_BASE ((unsigned int)&P3IN)

    /* The UART Module's Tx Pin Mask. */
    // Armen #define BT_UART_PIN_TX (BIT4)
    #define BT_UART_PIN_TX (BIT3)

    /* The UART Module's Rx Pin Mask. */
    //Armen #define BT_UART_PIN_RX (BIT5)
    #define BT_UART_PIN_RX (BIT4)