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About the configuration of SPI master mode in the _hal_uart_spi.c

If I define HAL_SPI_MASTER and HAL_UART_SPI ==2, why the PxIEN,  PxIF, PxIF, SPI_RDYIn, PICTL_BIT, ... all goes to configure Port 0?  

It should be Port 1 at Alt. 2 location, right?

Can anyone explain it to me? Thank you.

/* New define table 1*/
#if defined HAL_SPI_MASTER

/* Settings for SPI Master for SPI == 1 or 2 */
#define PxIEN P0IEN
#define PxIFG P0IFG
#define PxIF P0IF
#define SPI_RDYIn P0_1
#define SPI_RDYIn_BIT BV(1)
/* Falling edge ISR on P0 pins */
#define PICTL_BIT BV(0)
#define IENx IEN1
#define IEN_BIT BV(5)

#elif (HAL_UART_SPI == 2)
#define PxIEN P1IEN
#define PxIFG P1IFG
#define PxIF P1IF
#define SPI_RDYIn P1_4
#define SPI_RDYIn_BIT BV(4)
/* Falling edge ISR on P1.4-7 pins */
#define PICTL_BIT BV(2)
#define IENx IEN2
#define IEN_BIT BV(4)

#elif (HAL_UART_SPI == 1)
#define PxIEN P0IEN
#define PxIFG P0IFG
#define PxIF P0IF
#define SPI_RDYIn P0_4
#define SPI_RDYIn_BIT BV(4)
/* Falling edge */
#define PICTL_BIT BV(0)
#define IENx IEN1
#define IEN_BIT BV(5)
#endif

//================

static void HalUARTInitSPI(void)
{
#if (HAL_UART_SPI == 1)
PERCFG &= ~HAL_UART_PERCFG_BIT; /* Set UART0 I/O to Alt. 1 location on P0 */
#else
PERCFG |= HAL_UART_PERCFG_BIT; /* Set UART1 I/O to Alt. 2 location on P1 */
#endif
#if defined HAL_SPI_MASTER
PxSEL |= HAL_UART_Px_SEL_M; /* SPI-Master peripheral select */
UxCSR = 0; /* Mode is SPI-Master Mode */
UxGCR = 15; /* Cfg for the max Rx/Tx baud of 2-MHz */
UxBAUD = 255;
#elif !defined HAL_SPI_MASTER
PxSEL |= HAL_UART_Px_SEL_S; /* SPI-Slave peripheral select */
UxCSR = CSR_SLAVE; /* Mode is SPI-Slave Mode */
#endif
UxUCR = UCR_FLUSH; /* Flush it */
UxGCR |= BV(5); /* Set bit order to MSB */

P2DIR &= ~P2DIR_PRIPO;
P2DIR |= HAL_UART_PRIPO;

/* Setup GPIO for interrupts by falling edge on SPI_RDY_IN */
PxIEN |= SPI_RDYIn_BIT;
PICTL |= PICTL_BIT;

SPI_CLR_RDY_OUT();
PxDIR |= SPI_RDYOut_BIT;

.....

}