Hello,
While debugging my own problems I encountered the following: is there a contradiction between the cc254x users guide and the sample TI code or am I missing something in my own understanding.
The users guide says in section 2.5.1:
Note that when clearing source interrupt flags in a register that contains several flags, interrupts may be
lost if a read-modify-write operation is done (even in a single assembly instruction), as it also clears
interrupt flags that became active between the read and write operation. The source interrupt flags (with
the exception of the USB controller interrupt flags) have the access mode R/W0. This means that writing 1
to a bit has no effect, so 1 should be written to an interrupt flag that is not to be cleared. For instance, to
clear the TIMER2_OVF_PERF bit (bit 3) of T2IRQF in C code, one should do:
T2IRQF = ~(1 << 3);
and not:
T2IRQF &= ~(1 << 3); // wrong!
hal_dma.h contains:
#define HAL_DMA_CLEAR_IRQ( ch ) DMAIRQ &= ~( 1 << (ch) )
Are the DMA channels are mutually exclusive so that this code segment will not unwittingly clear DMA interrupts that may fire during the read-modify-write cycles of the HAL_DMA_CLEAR_IRQ macro?
Steve
