CC26XX GP Timers.

I am using a pair of general purpose timers to capture the rising and falling edge of an input signal.  The technical reference seems to indicate that when the timers are configured in edge capture mode, the upper 24 bits of the timer can be retrieved from the prescaler register.  However, I never see this value change (it always reads zero).  I would have expected it to increment when the timer rolls over from 0xFFFF to 0x0000.   

Here's my setup:

HWREG(IOC_BASE + IOC_O_IOCFG2) |= (IOC_IOCFG2_EDGE_DET_POS | IOC_IOCFG2_PORT_ID_PORT_EVENT0);
HWREG(IOC_BASE + IOC_O_IOCFG26) |= (IOC_IOCFG26_EDGE_DET_NEG | IOC_IOCFG26_PORT_ID_PORT_EVENT1);

// Set the pins to trigger PORT_EVENT0 and PORT_EVENT1 respectively

// NOTE FROM TI: IOC_PORT_MCU_TIMER0 is equivalent to PORT_EVENT0
PINCC26XX_setMux(hPinHandle, Board_VXBOOST_CMP, IOC_PORT_MCU_TIMER0);
PINCC26XX_setMux(hPinHandle, Board_VXBOOST_CMP2, IOC_PORT_MCU_TIMER1);

// Set EVENT0 and EVENT1 to trigger the edge capture of the GP timers.
HWREG(EVENT_BASE + EVENT_O_GPT0ACAPTSEL) = EVENT_GPT0ACAPTSEL_EV_PORT_EVENT0;
HWREG(EVENT_BASE + EVENT_O_GPT0BCAPTSEL) = EVENT_GPT0BCAPTSEL_EV_PORT_EVENT1;

// Enable GPT0

HWREG(PRCM_BASE + PRCM_O_GPTCLKGR) |= PRCM_GPTCLKGR_CLK_EN_GPT0;
PRCMLoadSet();

TimerConfigure(GPT0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_CAP_TIME_UP | TIMER_CFG_B_CAP_TIME_UP);

// Sets timer A to save value on rising edge.
TimerEventControl(GPT0_BASE, TIMER_A, TIMER_EVENT_POS_EDGE);

// Sets timer B to store value on falling edge.
TimerEventControl(GPT0_BASE, TIMER_B, TIMER_EVENT_NEG_EDGE);

// Enable both timers

TimerEnable(GPT0_BASE, TIMER_BOTH);

TimerIntRegister(GPT0_BASE, TIMER_A, processRisingEdge);

TimerIntRegister(GPT0_BASE, TIMER_B, processFallingEdge);

----

When the interrupt triggers, I use the following to read the positive edge capture:

lastRising = HWREG(GPT0_BASE + GPT_O_TAPV) << 16;
lastRising += (HWREG(GPT0_BASE + GPT_O_TAR) & 0x0000FFFF);

And similarly for the falling:

lastFalling = HWREG(GPT0_BASE + GPT_O_TBPV) << 16;
lastFalling += (HWREG(GPT0_BASE + GPT_O_TBR) & 0x0000FFFF);

There seems to be a number of register that map in some way to the prescaler register (TxPV, TxPS, TxPR), but these don't have much documentation behind them.  I've tried them all, but none seem to ever change.

Any ideas what I may be doing wrong?