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CC2640 GPIO Pin leakage current in tri-state

Other Parts Discussed in Thread: CC2640

Hello Community,

in the Technical Reference Manual of the CC26xx Family in chapter 11.6 it is mentioned that an tri-stated I/O Pin might have some leakage current if connected to a differential voltage potential.

Now my questions are the following:

1. How high is the leakage current if connected to a certain voltage level

2. For further calculation of the schematic around the CC2640, is it possible to assume an fixed inner resistor value to VDD or GND if the I/O Pin is in tri.state? If yes, what is the value?

3. Is there a more detailed schematic of the inner circuit of an I/O Pins available as the one stated in chapter 11.10.1 Physical Pin (found in Technical Reference Manual of the CC26xx)?

Thanks in advance.