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SRF06 EB - UART Pin Inversion

Shaba Abhiram
Intellectual 540 points
Other Parts Discussed in Thread: CC2650

Hey folks,

Is it possible via the GPIO pin init table, to invert the output of the Ti CC2650 GPIO UART Tx Pin? 

The pin mapping I am using sets the "PIN_INV_INOUT" define. I have looked at the PIN.h documentation as well as the S/W Developers Guide. Currently using a nand gate to invert the signal after the fact works, but I would like to drive this signal correctly from the GPIO pin itself.

Any help or pointers will be greatly appreciated!

  • 0
    Intellectual 540 points
    The documentation in the IO Control section claims the following:

    • Open-Source or Open-Drain Configuration (IOC:IOCFGn.IOMODE)
    Configures the pin as normal, open source, or open drain; all of these can be set to either inverted or
    normal (noninverted).

    I wish to run my UART TX pin as inverted to match my device under test. Here is my UART pin setup:
    Board_DP5_UARTTX | PIN_GPIO_OUTPUT_EN | PIN_PUSHPULL | PIN_INV_INOUT

    Anything stand out to the experts on why this is not working as expected?
  • 0 in reply to Shaba Abhiram
    TI__Guru** 105180 points
    Hello,

    I've notified the driver team to check on the possible options.

    Best wishes
  • 0 in reply to JXS
    Intellectual 540 points

    Thank you for that - until said time I will just use a HW logic inverter :)

  • 0 in reply to JXS
    Intellectual 540 points
    Any updates on this JXS?

    Here is my hunch on what is going on:
    When I set a pin to be the "UART" pin, I think the library code which initializes and configures the UART interface is setting up the pin without honoring the INVERT flag which might or might not be set at pin config time when the boar's GPIO init is called.

    Could you please check with your driver team if the above is the case? Also could you ask them if the architecture exposes the registers natively so I can manually mux in the flags that I need for the respective IOCONFIG<N> register?
  • 0 in reply to Shaba Abhiram
    TI__Guru 56590 points
    Hello Shaba Abhiram,
    Here is the line in the UART driver (UARTCC26XX.c) that sets the TX pin. You can try to simply modify this and test. Let me know if that works.

    From C:\ti\tirtos_simplelink_2_11_01_09\packages\ti\drivers\uart\UARTCC26XX.c:

    /* Make sure UART_TX pin is driven high after calling PIN_open(...) until
    * we've set the correct peripheral muxing in PINCC26XX_setMux(...)
    * This is to avoid falling edge glitches when configuring the UART_TX pin.
    */
    uartPinTable[i++] = hwAttrs->txPin | PIN_INPUT_DIS | PIN_PUSHPULL | PIN_GPIO_OUTPUT_EN | PIN_GPIO_HIGH;
  • 0 in reply to Eirik V
    Intellectual 540 points

    That works - now to refactor that code so it is included in my project so it is isolated from updates etc. Thanks for the pointer Eirik!