CC2640 - LF clock is not working

Hi everyone,

I come back on this problem because I really need to find the solution ! 

I use an external 32.768 crystal (FC-135) connected to X32K_Q1 and Q2 pins as on the picture. There is no capacitor next to it because I don't have much place (and it is already +- 20ppm, far enough). The CC2640 I use is 4x4mm (complete name : CC2640F128RSMT) version 2.2

I'm using the latest version of TI-RTOS, driverlib and XdcTools. Configuration of clocks and timers is:

/* Enable idle task (default). */
Task.enableIdleTask = true;
/* Clock options */
Clock.tickPeriod = 10;
Clock.timerId = -1;
Power.idle = true;
Power.policyFunc = Power.standbyPolicy;
Clock.tickSource = Clock.TickSource_TIMER;
Task.idleTaskStackSize = 512;
Task.idleTaskVitalTaskFlag = false;

In the ccfg.c file, the configuration is the following:

//#####################################
// Clock settings
//#####################################

//#define SET_CCFG_MODE_CONF_SCLK_LF_OPTION            0x0        	// LF clock derived from High Frequency XOSC
//#define SET_CCFG_MODE_CONF_SCLK_LF_OPTION            0x1        	// External LF clock
#define SET_CCFG_MODE_CONF_SCLK_LF_OPTION              0x2      	// LF XOSC
//#define SET_CCFG_MODE_CONF_SCLK_LF_OPTION            0x3        	// LF RCOSC

// #define SET_CCFG_MODE_CONF_XOSC_CAP_MOD              0x0        // Apply cap-array delta
#define SET_CCFG_MODE_CONF_XOSC_CAP_MOD                 0x1        // Don't apply cap-array delta 

#define SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA          0xFF       // Signed 8-bit value, directly modifying trimmed XOSC cap-array value

#define SET_CCFG_EXT_LF_CLK_DIO                         0x01       // DIO number if using external LF clock

#define SET_CCFG_EXT_LF_CLK_RTC_INCREMENT               0x800000   // RTC increment representing the external LF clock frequency

The problem is that the system does not go in standby mode and I have an offset of 1.5mA in Idle mode (picture is showing the current consumption during advertising, around 1.3mA/division. 

I decided to check the configuration during the main function of the task by using the LED on my board : 

	const uint16_t Wait_ = 50000 ;
	OSCClockSourceSet(OSC_SRC_CLK_LF, OSC_XOSC_LF);
	if(OSCClockSourceGet(OSC_SRC_CLK_LF) != OSC_XOSC_LF)
	{
		if(PIN_open(&hStateHui, aPinListHui))
		{
			PIN_setPortOutputValue(&hStateHui, (1<<LED1));
			Task_sleep(Wait_);
			PIN_setPortOutputEnable(&hStateHui, 0);
			Task_sleep(Wait_);
			PIN_close(&hStateHui);
		}
	}

	if(OSCClockSourceGet(OSC_SRC_CLK_HF) != OSC_XOSC_HF)
	{
		if(PIN_open(&hStateHui, aPinListHui))
		{
			PIN_setPortOutputValue(&hStateHui, (1<<LED1));
			Task_sleep(Wait_);
			PIN_setPortOutputEnable(&hStateHui, 0);
			Task_sleep(Wait_);
			PIN_close(&hStateHui);
		}
	}

The led will blink only one time, when I check if the source of LF CLK is incorrect. I measured the signal on X32K_Q2 pin and I saw a 32.68Khz sinus (+-46mV) with an offset of 350mV. This signal does not change during measures and the voltage on DCOUPL pin is stable at 1.35V.

I have tested 4 PCBs in the very same configuration, but none of them is able to go in standby mode by using the crystal. It works by setting it to internal RCOSC but the errata file concerning the CC26xx series indicate the it cannot be trusted, and sometimes during my tests i saw the system restarting before advertising (very bad for the global current consumption). In last topic somebody said that using external CLK on a pin is working, but I can't use this configuration.

Thanks in advance to anybody able to help me, i really need to find a solution or a reason of this failure.

Have a nice day

Sebastien