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CC2650 layout questions

Xiaoxiao Hou
Intellectual 405 points
Other Parts Discussed in Thread: CC2650
Dear TI BLE group,

I am trying to design my proto-board based on MCU CC2650. I looked at the reference designs offered by you (EM-7ID, EM-5XD, and EM-4XS) and came up with some questions I don't fully understand. 

1) It seems there are many stitching vias connecting top and bottom ground plane, seemingly randomly distributed on board. I am thinking if there is any rule on placing the stitching vias, e.g., is there any spacing constraint? Is there any recommendations for the via size?
2) Is it necessary to have vias shield lines for the RF antenna path? 
3) It seems the power lines (VDD_EB, VDDS, VDDR) are wider than the rest of the signals lines. For example in reference design EM-5XD, VDDS and VDDR trace width are 12mils, while most signal line width is 6mils. I am a little bit confused since I believe trace with 6 mils width is able to carry current with tens of mA without a problem. Is there any particular reason to make the power lines wider?
Thanks for your time! Really appreciate that!
  • 0
    TI__Guru** 106705 points

    Hi Xiaoxiao,

    1) There are no specific rules here, but you should avoid using a fixed grid. Randomly placed vias with about the same relative distance as in the reference designs will work well.

    2) It is common for RF designs to implement this, but we have not seen any particular benefit with it. It is more important to have several ground vias close to the ground connections of RF components and the antenna.

    3) You are right. We just made the traces wider since it won´t hurt and it was room for it.

    Cheers,
    Fredrik

  • 0 in reply to Fredrik K
    Intellectual 405 points
    Thank you so much for your answers!! They are really helpful!