Hi,
I have two general questions on this topic:
1) How much flexibility do we have on thermal vias placement?
CC2650 datasheet recommended using a 3*3 array of thermal vias (8mils diamter and 40 mils spacing)
However, in the reference design (EM-7ID, 5XD, 4XS, and 4XS-Ext_Reg), it seems packages of all sizes use a 4*4 array of thermal vias (20mils diameter and 36 mils spacing).
For the DC-DC converter TPS62740 in the design EM-4XS-Ext_reg, thermal vias is not even included, while in the datasheet, a line of 3 vias (12mils diameter and 28 mils spacing) is recommended.
I checked the application notes of both slua271a and sloa122, and they both agree that vias with 15 mils diameter and 40 mils spacing is a good starting point for QFN package, and vias size could be reduced accordingly.
I guess the reason that thermal vias placement is not strictly followed is because both CC2650 and TPS62740 are dedicated for low-power application so thermal vias or not won't hurt the thermal dissipation much?
2) Is it preferred to tent the vias or not?
I think so. But it seems we get contradicting opinions from both application notes: slua271a says yes and sloa122 says no.
Looking forward to your replies.
Thanks a lot!! Much appreciated!