cc2650 RAM

The 20kB system SRAM is the normal RAM the application is using.

By updating to the latest TI RTOS you could also use the cache SRAM as normal RAM as well. The drawbacks of doing this is significantly slower program execution (down to 1/3 of normal speed) and 2-3uA in standby instead of 1uA as this RAM is not ultra-low-leakage as the normal RAM is.

I see:
SRAM 20000000 000043e7 00003055 00001392 RW X
in the peripheral application map!

the unused SRAM is 0x1392 = 5010 bytes!

OK I have the most updated RTOS! how can I use the 8KB RAM? can I find an example?

Thanks.

Hi Feras,

That sounds quite high. The original SimpleBLEPeripheral program built with IAR 7.40.3 has 8800 bytes free RAM.

To use the cache RAM as well you need to modify the included CCFG (from appBLE_ccfg.c) and change:

#define SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM           0x1        // Cache is enabled and GPRAM is disabled (unavailable)

to

#define SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM        0x0        // Cache is disabled and GPRAM is available at 0x11000000-0x11001FFF

After doing this you can add the GPRAM area as well to your linker file (TOOLS/cc26xx_ble_app.cmd):

#define GPRAM_SIZE 0x2000
#define GPRAM_BASE 0x11000000
...
MEMORY
{
 ...
 GPRAM (RWX) : origin: GPRAM_BASE, length=GPRAM_SIZE
}

SECTIONS

{
...
 .data           :   > SRAM | GPRAM
 .bss            :   > SRAM | GPRAM
 .sysmem         :   > SRAM | GPRAM
}

For more information on CCS linker files you can refer to the Code Composer Studio E2E forum and the TI ARM Assembly Tools Guide:

http://www.ti.com/lit/ug/spnu118n/spnu118n.pdf

.:svend

Thanks,

OK I am using CCS

Hi svendbt,

I tried the method you suggested to use GPRAM and I get a linker error. I modified this linker file [1] as such:

    .bss :
    {
        _bss = .;
        *(.bss*)
        *(COMMON)
        _ebss = .;
    } > SRAM | GPRAM

I get the following linker error:

  CC        measurement-module.c
  LD        measurement-module.elf
c:/program files (x86)/gnu tools arm embedded/4.9 2015q3/bin/../lib/gcc/arm-none-eabi/4.9.3/../../../../arm-none-eabi/bin/ld.exe:../../cpu/cc26xx-cc13xx/cc26xx.ld:98: syntax error
collect2.exe: error: ld returned 1 exit status

I tried what I thought would be an alternative by adding the following to the linker file before the .bss section:

.gpram :
    {
        *(.bss.v_fifo_data_u8)
    } > GPRAM

where v_fifo_data_u8 is a large global array I wish to put in the GPRAM. When the program tries to access this memory at runtime, it hard faults with bus fault error and the BFAR is 0x11000000, the origin of the GPRAM.

Can you tell me what I am doing wrong in each of these cases?

Thanks,

Paul

[1] github.com/.../cc26xx.ld

Turns out in Contiki, you need to set ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_DISABLED); in main() and wake_up()

Hi Paul White95,

Can you use cache RAM correctly? In my test, when I use cache RAM part the system will crash. Can you share your experiment on cache RAM? thanks

 

Hi Yuhua,

I don't have an isolated experiment to give you. The main steps we followed were

1. Find a global, initialized variable to put in gpram (v_fifo_data_u8 in example below).
2. Modify the .ld file as below. Put the .gpram section before the .bss section
3. set ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_DISABLED); in main() and wake_up(). This enables the gpram. Without this step, it will crash.

.gpram :
    {
        *(.bss.v_fifo_data_u8)
    } > GPRAM

The .gpram section of the .map file should contain the variable you allocate to gpram.

Hi Paul White95,

Thank you for your help, I will try it.