Other Parts Discussed in Thread: CC2564
I am working on setting up the I2S configuration for CC2564 B.
I am using assisted WBS and the current settings are like -
- PCM : 1024
- Bluetooth chip as Slave
- Fs : 16000
- Duty Cycle : 50%
- Frame Sync Edge : Falling Edge
- Frame Sync Polarity : Active Low
- Channel 1 Data Out Size : 16 bits
- Channel 1 Data out offset : 1
- Channel 1 Data out Edge : 1 ( Falling ) ... other parameters are also setup.
My Freq Sync is driven at Falling edge and polarity is active low.
The parameter 'Channel 1 data out offset' refers to 'Number of PCM clock cycles between rising of frame sync and data start' .
Should it be always RISING edge ? ( I believe, it should be based on the frequency sync signal polariy )
Here is the link of a command used to update the codec configuration.
