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CC2640: Load capacitance

YING CHENG
Intellectual 260 points

Part Number: CC2640
Other Parts Discussed in Thread: CC2540

Let me introduce my question as below

The goal is to calculate load capacitance of exteral crystal which is used RF clock of CC2640.

On this website http://processors.wiki.ti.com/index.php/CC26xx_Tips_and_Tricks, we can know load capaciatance is 9pF when delta is 0.

To do that, we can make the following assumption

All parastic capacitance from pin or layout is 4pF on each pin

Delta=0

Please help me check which formula is correct:

Formula 1: total load capacitance of crystal=0.5*(9+4)=6.5pF

Formula 2: total load capacitance of crystal=9+0.5*4=11pF

And in this application note http://www.ti.com/lit/an/swra495e/swra495e.pdf, please see figure 3. We can see "CL_intx2". What is correct meaning for this symbol? Is it 9F or 18pF? Or it means there are two 9pF internal capacitor?

Could you please clarify?

Thanks a lot~

  • 0
    TI__Guru 56590 points

    Hello User,

    The crystal used in our reference design has CL = 9 pF, so this is what the internal cap-array is tuned to by default which include parasitic capacitance on TI reference designs. if You copy our ref design and use a crystal with equal load capacitance requirement you can use the default setting for the internal cap array.

    The total load capacitance from the two discrete capacitor components alone are half the value of the capacitor value used (two equal size capacitors). Figure 3. show a simplified equivalent circuit. For example, if only external load capacitors where used (CL1  and CL2) and if CL_int was 0, then using two 18pF capacitors would result in a load capacitance of 9 pF (excluding parasitic capacitance). I explained this concept in another thread for the CC2540 crystal load capacitance:

    https://e2e.ti.com/support/wireless_connectivity/low_power_rf_tools/f/155/p/332131/1158815#1158815

    If you have access to a spectrum analyzer you can set up a continuous wave (CW) TX signal and observe the offset from the programmed center frequency and adjust the load capacitance if your offset from carrier is to big:

    • Reduce the load cap to increase the carrier frequency.
    • Increase the load cap to reduce the carrier frequency.

  • 0 in reply to Eirik V
    Intellectual 260 points
    hello, thanks for your feedback. When delta is 0 and we ignore parastic capcitance from pin and layout on our board, whether I can say the load capacitance of external crystal is 9pF or half of 9pF. Thanks for your clarification