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CC2541: External Crystal Issue

Part Number: CC2541

Hi,

We have a CC2541 based design that uses a 32MHz crystal for external clock (Part #: SJKY7U32000M121050B10, manufactured by Shenzhen Crystal Technology). We have several 100's of these units deployed, but on a few units (3), we are seeing a weird problem. All these 3 units used to work perfectly fine, we were able to connect to them using our BT app and sustain the link and operate them. After a few weeks of working perfectly fine, these 3 units stopped communicating with the app and when we opened up the HW to debug, we narrowed it down to the 32MHz clock. The code is basically stuck in the following code snippet at startup:

#define START_HSOSC_XOSC() \
{ \
SLEEPCMD &= ~OSC_PD; /* start 16MHz RCOSC & 32MHz XOSC */ \
while (!(SLEEPSTA & XOSC_STB)); /* wait for stable 32MHz XOSC */ \
}

The code is stuck in while() loop because there is no stable 32MHz clock (it is flat). We looked at the XOSC_Q2 output from the cc2541 chip and it is flat at 3.3V.

When we change the code to use the internal 16MHz instead of external 32MHz clock, units are alive again, so we have very high confidence that the problem is somewhere in the closed loop 32MHz circuitry or in the software that drives this loop

Since the units used to work properly, we are hesitant to conclude that this is a HW (crystal/chip) problem. At the same time we are at a loss as to what SW could do to cause 32MHz clock to be flat.

Appreciate any help/hints/guidance that could help us resolve this issue.

Thanks

Yohannes

  • Hi Yohannes,

    This sounds like a problem with your crystal. Can you post the datasheet for the crystal (the part number does not give any hits when searching the web).

    Have you tried swapping crystals between one of your bad boards and a good one?

    Regards,
    Fredrik
  • Hi Fredrik,

    Thanks for the quick response. Yes I have tried replacing the crystal on the bad unit but that still didn't work. Attached is the datasheet for the part we are using.

    Thanks
    Yohannes

    Crystal32MHz_q-crystal-SJKY7U.pdf

  • Hi Yohannes,

    So the CC2541 does not run even when the crystal is replaced with a known good unit? Did you try placing the crystal from the bad board on another board also?

    The datasheet is generic and does not specifically state the parameters of the crystal you are using. What are the values of CL and C0?

    Regards,
    Fredrik
  • Hi Fredrik,

    Yes that is correct CC2541 still doesn't run when I replace the crystal with a known good unit, but no I have not tried placing the crystal from the bad board on another board.

    The capacitors are both 12pf

    Thanks
    Yohannes

  • BTW Fredrik, sending the schematic snippet showing the 32MHz and 32kHz crystal circuits used with the cc2541 chip. Just in case there's some kind of hint there.

    Thanks
    Yohannes

  • Hi Yohannes,

    I meant the CL and C0 values for the crystal itself, not the values of the load capacitors you are using.

    Regards,
    Fredrik
  • Hi Fredrik,

    Sorry for the delay answering your question regarding CL and C0. CL = 12pF and c0 = 5.0pF Max (I'm also attaching a more detailed datasheet for the part)

    Per your suggestion we took the crystal from the non working board and put it on another board and the system there works fine.

    We have looked at the issue more since the last update. We captured the RESET, XOSC_Q1 and XOSC_Q2 signals connected to the cc2541 chip on a digital scope. What we see is:

    On a board that doesn't get stuck (i.e. working board):

    1. Reset is de-asserted

    2. ~700us later cc2541 drives XOSC_Q2 high

    3. crystal locks to 32MHz and both XOSC_Q1 and XOSC_Q2 oscillate at 32MHz but out of phase

    On a board that does get stuck (i.e. non-working board):

    1. Reset is de-asserted

    2. cc2541 never drives XOSC_Q2 high and so no output out of the crystal on XOSC_Q1

    Really scratching our heads on this one. Is there anything on the chip that would keep the crystal it from driving the external crystal?

    Something else that is confusing in the code is the usage of SLEEPCMD.OSC_PD and the associated comments. In the start MACRO it seems to be used to start the internal 16MHz and the external crystal:

    #define START_HSOSC_XOSC()                                                     \

    {                                                                              \

     SLEEPCMD &= ~OSC_PD;            /* start 16MHz RCOSC & 32MHz XOSC */         \

    But  in the stop MACRO it seems to be used to stop only the internal 16MHz

    #define STOP_HSOSC()                                                           \

    {                                                                              \

     SLEEPCMD |= OSC_PD;             /* stop 16MHz RCOSC */                       \

    On a related but separate note, looking at the cc2541 users guide the bit being used to bring oscillators out of power down mode (SLEEPCMD.OSC_PD) and the bit being used to monitor oscillator status (SLEEPSTA.XOSC_STB) are not documented - both bits are shows as RESERVED. Is there a newer version of the users guide that describes these bits?

    Thanks
    Yohannes

    Crystal-SJK-7U-32.00-12-10-60-B-10.pdf.pdf

  • Hi Fredrik,

    We have more information that might shed some light on this issue and wanted to run it by you. Specifically we've learned that when the system gets into the bad state, the output from the CC2541 chip on XOSC_Q2 gets stuck into a "low resistance to ground" state (about 10 ohms), which prevents this pin from ever being driven high to the external crystal to start the oscillator, and the chip gets stuck in a while loop waiting for the XOSC to power up.  This low resistance state persists regardless of whether the system is powered on or off. When we measure this resistance on a "normal" board that doesn't have this problem we get something like 4 Megaohms. The only way we've found to get the system out of the bad state is to desolder, remove, and then re-attach and re-solder the external 32 MHz crystal. When we measure the resistance to ground on the XOSC_Q2 pin after removing the external crystal see 4 megaohms. When we put back the crystal - still see 4 megaohms. We have no idea why removing and re-attaching the crystal fixes the problem, but we've confirmed this on two separate boards that had this problem. 

    Questions:
    • Does any of this sound familiar to you? We are seeing symptoms like this (i.e., CC2541 not able to boot) in about 2% of the several hundred units we have in the field. 
    • Is there any path in the loop that could cause the Q2 output to be connected to ground permanently? For example could the external crystal path be permanently powered down?
    • We have read SLEEPCMD.OSC_PD and SLEEPCMD.PWR_MODE(1:0), they are both set to 0, so XOSC is not powered down from there. Is there any other possible path that could cause a low resistance path of XOSC_Q2 to ground?
    • Any ideas for a potential workaround? We've thought of using the CLD (clock-loss detection) register - might it have additional logic that corrects this issue during a CLD-induced reset?

    Thanks
    Yohannes

  • Hi Yohannes,

    I have never seen this problem with any of our CC25xx devices before. To me it sounds like a crystal defect, especially since the impedance jumps back to the correct value as soon as the crystal is removed from the circuitry. Have you contacted the crystal manufacturer in addition to posting here?

    If you can get devices to consistently fail, it would be interesting to try mounting a different crystal part and see if that remedies the situation.

    Regards,
    Fredrik