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CC2564: HFP: Audio is missing values

Part Number: CC2564


Hello,


we are using a CC2564B together with the Bluetopia Stack v4.2.1.0 on a STM32L476. The code has been ported from STM3240G-EVAL (NO-OS) folder.

Device Chipset: 4.1
BTPS Version  : 4.2.1.0
PLAT Version  : 1.0
Project Type  : 6
FW Version    : 7.35

The device we are developing is a Bluetooth Headset and it should include the HFP and A2DP profiles. The A2DP profile (sink) is working as expected (using the assisted feature over I2S / PCM).

The HFP Profile is also integrated and used when making a phone call. Basic audio data is received at the headset, but it has some missing/repeated values. (Using 16 kHz / WBS / Assisted via I2S PCM)

There are about 8 values repeated roughly every 75 ms (so there is somewhat a pattern, but it is not consistent). It looks like the last sample value is repeated and and the signal continues exactly where it has stopped previously.

Might this be a problem in the Configuration? (For A2DP the ACL priority is reconfigured for a lower latency, is there something similar for HFP? The demo code seems not to have anything like this for HFP)

Do you need anything else?

Thank you and best regards,
Tommy Sparber

Audio sample with 2.5 kHz, recorded directly from the PCM output of the CC2564.

Recorded from DAC output:

Printed from recorded I2S Data

Raw I2S Data:

output.xlsx

BT Log:

BTLog.zip

  • Our firmware expert will review and get back shortly,
  • Hello Tommy,

    Please upload the BT logs with HCI/LMP traces enabled.
    User's Guide : processors.wiki.ti.com/.../CC256x_Logger_User_Guide

    Best regards,
    Vihang
  • Hello Vihang,

    please find the Log with HCI/LMP traces enabled here: (First and A2DP+HFP connection to an iPhone are established, then phone call switches to HFP and 16 kHz/WBS)

    BTLog+HCI.zip

    Some more information I forgot in the Initial post:

    We are using a PCM bit clock of 1.024 MHz and 32 bits per channel as required by our DAC. The sample code uses only 16 bits per channel and thus a bit clock of 512 kHz.

    I also just measured the frame sync it is 16.084 kHz (and 1.029 MHz bit clock). Are there any accuracy requirements for the frame sync?

    For the A2DP setup we use a frame sync 44.1 kHz  and also 32 bits / channel and thus a bitclock of 2.8224 MHz. and it works perfectly fine without any hickups, altough the measured bitclock there is also more accurate (2.823 MHz).

    Thank you and best regards,

    Tommy Sparber

  • Hello,

    upon further investigation, I managed to change my frame sync clock to match the 16kHz more accurately (15.997 kHz, 3 Hz error instead of 80 Hz from 16.080 kHz).

    The error is now gone. I'm assuming now, that the PCM frame clock should be as accurate as possible and otherwise buffer over/underruns may occur and the module does not synchronize itself to the external PCM clock even tough it is used as a PCM slave. Is this assumption right?

    Best,

    Tommy Sparber

  • Tommy,

    This analysis makes sense. The PCM buffer overrun/under runs are possible specially when the PCM of the CC256x is PCM slave and it is also slave on the Bluetooth connection. Thus, it is best to have CC256x as PCM master and Bluetooth connection master (if possible).

    I am glad to know that you were able to solve this issue by fine-tuning the PCM clock to accuracy.

    Best regards,
    Vihang