Starterware/CC2640R2F: Page alignment issue.

Thangaraj P33

Part Number: CC2640R2F

Tool/software: Starterware

Hi All,

I am usnig Ble stack version v3.0.1 (C:\ti\simplelink_cc2640r2_sdk_1_00_00_22) along with cc2640R2F chipset.

Example Project used : C:\ti\simplelink_cc2640r2_sdk_1_00_00_22\examples\rtos\CC2640R2_LAUNCHXL\blestack\simple_peripheral.

Our requirement is like this.

0x00000 -0x1CFC0- - (Application and stack)

0x1CFC1- 0x1CFFF -( need to store the keys for our application requirement

0x1D000- 0x1EFFF - SNV(2 pages)

0x1F000-0x1FFFF - ccfg.

So i modified the linker to achieve the above like this .modified icf file in the attachment.

Fullscreen cc26xx_ble_stack.txt Download

/******************************************************************************

 @file  cc26xx_stack.icf

 @brief IAR ARM Linker Configuration File - BLE Stack

        Note: Code stack and heap are allocated by the Application/RTOS build.

        Imported Symbols
        Note: Linker defines are located in the IAR IDE project using
        --config_def in Options->Linker->Extra Options, or placed in
        Options->Linker-> Config->Configuration file symbol definitions.

        CCxxxx:             Device Name (e.g. CC2650). In order to define this
                            symbol, the tool chain requires that it be set to
                            a specific value, but in fact, the actual value does
                            not matter as it is not used in the linker control
                            file. The only way this symbol is used is based on
                            whether it is defined or not, not its actual value.
                            There are other linker symbols that do specifically
                            set their value to 1 to indicate R1, and 2 to
                            indicate R2, and these values are checked and do make
                            a difference. However, it would appear confusing if
                            the device name's value did not correspond to the
                            value set in other linker symbols. In order to avoid
                            this confusion, when the symbol is defined, it should
                            be set to the value of the device's ROM that it
                            corresponds so as to look and feel consistent. Please
                            note that a device name symbol should always be
                            defined to avoid side effects from default values
                            that may not be correct for the device being used.
        FLASH_ONLY_BUILD:   Build full BLE stack in flash only memory.
        FLASH_ROM_BUILD:    Build Flash portion of BLE stack to work with ROM
                            code. =1 for R1 devices, =2 for R2 devices.
        ROM_BUILD:          Build ROM portion of BLE stack.
        COMMON_ROM_BUILD:   Build of common ROM code.
        TEST_ROM_IN_FLASH:  Build ROM code in Flash memory to test.
        ICALL_STACK0_START: Start address of flash only and flash ROM builds.
        ICALL_RAM0_START:   Start address of RAM.
        ENCRYPTION_ROM:     Reserve ECC Engine RAM space (necessary for Secure
                            Connections when using a FLASH_ONLY_BUILD).
        PAGE_ALIGN:         Align BLE stack boundary to a page boundary.
                            Aligns to Flash word boundary by default.

        Exported Symbols
        Note: Can be used as externs in C code.

        ROM_BASE_ADDR:        Location of start of ROM (where RT Init is
                              expected).
        RAM_BASE_ADDR:        Location of start of RAM (for ICall and JT
                              pointers).
        COMMON_RAM_BASE_ADDR: Location of start of RAM (for ICall and JT
                              pointers).
        PAGE_SIZE:            Size of Flash sector, in bytes.
        NUM_SNV_PAGES:        Number of sectors used for Simple NV.

 Group: CMCU, SCS
 Target Device: CC2640R2

 ******************************************************************************
 
 Copyright (c) 2013-2017, Texas Instruments Incorporated
 All rights reserved.

 Redistribution and use in source and binary forms, with or without
 modification, are permitted provided that the following conditions
 are met:

 *  Redistributions of source code must retain the above copyright
    notice, this list of conditions and the following disclaimer.

 *  Redistributions in binary form must reproduce the above copyright
    notice, this list of conditions and the following disclaimer in the
    documentation and/or other materials provided with the distribution.

 *  Neither the name of Texas Instruments Incorporated nor the names of
    its contributors may be used to endorse or promote products derived
    from this software without specific prior written permission.

 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 ******************************************************************************
 Release Name: simplelink_cc2640r2_sdk_1_30_00_25
 Release Date: 2017-03-02 20:08:35
 *****************************************************************************/

////////////////////////////////////////////////////////////////////////////////
// Memory Sizes
////////////////////////////////////////////////////////////////////////////////
//
// In general, the naming convention is: CC26x1x2Yzzz, where:
// x1:  0=Transceiver (only subGHz)
//      1=Proprietary SoC
//      2=RF4CE/IEEE802.15.4 MAC
//      3=Zigbee/6LoWPAN SoC
//      4=BLE SoC
//      5=Flexible Technology SoC
//      6=OFDM (only subGHz so far)
//      7=ANT SoC
// x2:  0=Chameleon
//      2=Iguana
//      5=Komodo
// Y:   F=Flash
//      L=OTP
//      S=SimpleLink WNP
//      R=ROM Only
// zzz: Flash Size (kB)
//
////////////////////////////////////////////////////////////////////////////////

////////////////////////////////////////////////////////////////////////////////
// CC26xx
define symbol FLASH_BASE            = 0x00000000;
define symbol RAM_BASE              = 0x20000000;
define symbol ROM_BASE              = 0x10000000;

if ( isdefinedsymbol(CC2650) )
{
  define symbol RAM_SIZE            = 0x00005000; // 20K
  define symbol FLASH_SIZE          = 0x00020000; // 128K
  define symbol ROM_SIZE            = 0x0001C000; // 115K
  define symbol SIGNATURE_SIZE        = 0x00000040;  // 40B
}

////////////////////////////////////////////////////////////////////////////////
// Memory Definitions
////////////////////////////////////////////////////////////////////////////////

////////////////////////////////////////////////////////////////////////////////
// ROM
//
if ( isdefinedsymbol(COMMON_ROM_BUILD) )
{
  if ( COMMON_ROM_BUILD == 1 ) // R1 Common
  {
    define symbol ROM_START         = 0x10014C00;
    define symbol ROM_END           = 0x10019FFF;
  }
}
else if ( isdefinedsymbol(ROM_BUILD) )
{
  if ( ROM_BUILD == 1 ) // R1 BLE
  {
    if ( isdefinedsymbol(CC2650) )
    {
      define symbol ROM_START       = 0x10007000;
      define symbol ROM_END         = 0x1001BFFF;
    }
    else if ( isdefinedsymbol(CC2642) )
    {
      define symbol ROM_START       = 0x10007000;
      define symbol ROM_END         = 0x1001DFFF;
    }
  }
  else if ( ROM_BUILD == 2 ) // R2 BLE
  {
    define symbol ROM_START         = 0x10004940;
    define symbol ROM_END           = 0x10019AFF;
  }
}
else // not a ROM build
{
  define symbol ROM_START           = 0x00010000;
  define symbol ROM_END             = 0x0001FFFF;
}

// export the ROM base address
if ( isdefinedsymbol(ROM_BUILD) )
{
  define symbol ROM_BASE_ADDR       = ROM_START+1;
  export symbol ROM_BASE_ADDR;
}
else if ( isdefinedsymbol(COMMON_ROM_BUILD) )
{
  define symbol COMMON_ROM_BASE_ADDR = ROM_START+1;
  export symbol COMMON_ROM_BASE_ADDR;
}

////////////////////////////////////////////////////////////////////////////////
// RAM
//
if ( isdefinedsymbol(FLASH_ROM_BUILD) )
{
  if ( FLASH_ROM_BUILD == 1 ) // R1
  {
    if ( isdefinedsymbol(CC2650) )
    {
      define symbol RESERVED_RAM_SIZE = 0x00000718;
    }
    else if ( isdefinedsymbol(CC2642) )
    {
      define symbol RESERVED_RAM_SIZE = 0x00000B08;
    }
  }
  else if ( FLASH_ROM_BUILD == 2 ) // R2
  {
    define symbol RESERVED_RAM_SIZE = 0x00000C00;
  }

  define symbol RAM_START           = RAM_BASE;
  define symbol RAM_END             = RAM_START+RAM_SIZE-RESERVED_RAM_SIZE-1;
}
else if ( isdefinedsymbol(COMMON_ROM_BUILD) ) // R1 Common
{
  if ( COMMON_ROM_BUILD == 1 ) // R1 Common
  {
    if ( isdefinedsymbol(CC2650) )
    {
      define symbol RAM_START       = 0x20004F2C;
      define symbol RAM_END         = 0x20004FFF;
    }
    else // default
    {
      define symbol RAM_START       = 0x20003200;
      define symbol RAM_END         = 0x200032FF;
    }
  }

  define symbol COMMON_RAM_BASE_ADDR = RAM_START;
  export symbol COMMON_RAM_BASE_ADDR;
}
else if ( isdefinedsymbol(ROM_BUILD) )
{
  if ( ROM_BUILD == 1 ) // R1 BLE
  {
    if ( isdefinedsymbol(CC2650) )
    {
      define symbol RAM_START       = 0x200048E8;
      define symbol RAM_END         = 0x20004F2B;
    }
    else if ( isdefinedsymbol(CC2642) )
    {
      define symbol RAM_START       = 0x200134F8;
      define symbol RAM_END         = RAM_BASE+RAM_SIZE-1;
    }
    else // default
    {
      define symbol RAM_START       = 0x20003300;
      define symbol RAM_END         = 0x20003FFF;
    }
  }
  else if ( ROM_BUILD == 2 ) // R2 BLE
  {
    define symbol RAM_START         = 0x200044F8;
    define symbol RAM_END           = RAM_BASE+RAM_SIZE-1;
  }

  define symbol RAM_BASE_ADDR       = RAM_START;
  export symbol RAM_BASE_ADDR;
}
else // FlashOnly build
{
  if ( isdefinedsymbol(ENCRYPTION_ROM) )
  {
    if ( ENCRYPTION_ROM == 1 ) // R1
    {
      if ( isdefinedsymbol(CC2650) )
      {
        define symbol RESERVED_RAM_SIZE = 0xD4;
      }
      else if ( isdefinedsymbol(CC2642) )
      {
        define symbol RESERVED_RAM_SIZE = 0x80;
      }
    }
    else if ( ENCRYPTION_ROM == 2 ) // R2
    {
      define symbol RESERVED_RAM_SIZE = 0x80;
    }
    else //
    {
      define symbol RESERVED_RAM_SIZE = 0;
    }
  }
  else // default
  {
    define symbol RESERVED_RAM_SIZE = 0;
  }

  define symbol RAM_START           = 0x20000000;
  define symbol RAM_END             = RAM_START+RAM_SIZE-RESERVED_RAM_SIZE-1;
}

////////////////////////////////////////////////////////////////////////////////
// Flash
//

define symbol WORD_SIZE             = 4;

if ( isdefinedsymbol(CC2650) )
{
  define symbol PAGE_SIZE           = 0x1000;
}
export symbol PAGE_SIZE;

if (isdefinedsymbol(PAGE_ALIGN))
{
  define symbol FLASH_MEM_ALIGN     = PAGE_SIZE;
}
else
{
  define symbol FLASH_MEM_ALIGN     = WORD_SIZE;
}

define symbol NUM_RESERVED_PAGES    = 3;
define symbol RESERVED_SIZE         = (NUM_RESERVED_PAGES * PAGE_SIZE)+SIGNATURE_SIZE;

define symbol FLASH_START           = FLASH_BASE;
define symbol FLASH_END             = FLASH_SIZE-RESERVED_SIZE-1;
define symbol SNV_START           	= FLASH_END+SIGNATURE_SIZE +1;
define symbol SNV_END           	= SNV_START+ PAGE_SIZE+PAGE_SIZE-1;

////////////////////////////////////////////////////////////////////////////////
// ROM Revision Number
//
if ( isdefinedsymbol(ROM_BUILD) || isdefinedsymbol(COMMON_ROM_BUILD) )
{
  define symbol ROM_CRC_SIZE        = 2;
  define symbol ROM_REV_SIZE        = 2;
  define symbol ROM_REV_START       = ROM_END-ROM_CRC_SIZE-1;
  define symbol ROM_REV_END         = ROM_REV_START+ROM_REV_SIZE-1;
}

////////////////////////////////////////////////////////////////////////////////
// Memory Regions
////////////////////////////////////////////////////////////////////////////////

define memory mem with size = 4G;

define region ROM                   = mem:[from ROM_START   to ROM_END];
define region FLASH                 = mem:[from FLASH_START to FLASH_END];
define region RAM                   = mem:[from RAM_START   to RAM_END];
define region SNV                   = mem:[from SNV_START   to SNV_END];

if ( isdefinedsymbol(ROM_BUILD) || isdefinedsymbol(COMMON_ROM_BUILD) )
{
  define region ROM_REV = mem:[from ROM_REV_START to ROM_REV_END];
}

////////////////////////////////////////////////////////////////////////////////
// Memory Placement
// For ROM: C Runtime, Checksum, and ROM Revision Number.
////////////////////////////////////////////////////////////////////////////////

if ( isdefinedsymbol(ROM_BUILD) || isdefinedsymbol(COMMON_ROM_BUILD) )
{
  place in ROM { readonly };
  place in RAM { readwrite };

  // ROM C Runtime Routine
  place at start of ROM { ro section .romRuntimeInit };
  keep { section .romRuntimeInit };

  // Checksum
  place at end of ROM { ro section .checksum };
  keep { section .checksum };

  // ROM Revision Number
  place at start of ROM_REV { ro section .rom_rev };
  keep { section .rom_rev };

  // ICall Functions and ROM Flash Jump Table Location Pointers
  place at start of RAM { section .ramInitTable };
  keep                  { section .ramInitTable };

  // Combined ECC Data mapped to section at top of RAM.
  define block ECC_DATA with alignment=4 { section .eccRomData };
  place at end of RAM { block ECC_DATA };
}
else // !ROM_BUILD && !COMMON_ROM_BUILD
{
  define block ENTRY   with alignment=FLASH_MEM_ALIGN { ro section EntrySection };
  define block ROCODE                                 { ro };
  define block SNVSECT with alignment=PAGE_SIZE       { ro section .snvSectors };
  //
  define block ROSTK { first block ENTRY,
                        last block ROCODE };
                    
  //
  place at end of FLASH { block ROSTK };
  
  define block SNVSTK {  first block SNVSECT};
  
   place at end of SNV { block SNVSTK };

  define block RWDATA with alignment=8 { rw };
  //
  place at end of RAM { block RWDATA };
}

////////////////////////////////////////////////////////////////////////////////
// Initialization
////////////////////////////////////////////////////////////////////////////////

if ( isdefinedsymbol(ROM_BUILD) || isdefinedsymbol(COMMON_ROM_BUILD) )
{
  initialize by copy { readwrite };
}
else // !ROM_BUILD && !COMMON_ROM_BUILD
{
  initialize by copy with packing = packbits { readwrite };
}

do not initialize
{
  section .noinit,
  section .stack,
};

////////////////////////////////////////////////////////////////////////////////

but as like i already discussed in the below link there is 40 bytes of padding happened if the Flash end exactly as page alignment. else the padding is not happened. then functionality also not working.

so Please help to achieve my requirement.

Thanks.

With Regards,

Thangaraj.P

over 8 years ago

0 Thangaraj P33 over 8 years ago

Expert 1350 points

Hi All,

Please provide your feedback on my above query.

0 Sean2 over 8 years ago in reply to Thangaraj P33

TI__Mastermind 33460 points

Hello Thangaraj.P,

I can't exactly explain how the padding is selected, but I can say its related to grouping things into a block. IAR can provide more information about the internal workings of the linker.

I was able to achieve your needed configuration with the following:

1. In osal_snv.c

#pragma location = ".appKeys"

const uint8 application_keys[SIGNATURE_SIZE] = {0xAA};

2. See below linker changes

First, change things to grow down from SNV and reserve last sector for application/CCFG

define symbol NUM_RESERVED_PAGES    = 1;
define symbol RESERVED_SIZE         = (NUM_RESERVED_PAGES * PAGE_SIZE);

define symbol SNV_END               = FLASH_SIZE-RESERVED_SIZE-1;
define symbol SNV_START             = SNV_END - ((2*PAGE_SIZE)+ SIGNATURE_SIZE)+1;


define symbol FLASH_START           = FLASH_BASE;
define symbol FLASH_END             = SNV_START-1;

Second place app keys in their own section explicitly:

define block SNVSECT with alignment=PAGE_SIZE { ro section .snvSectors };
define block APPKEYS { ro section .appKeys };
//
define block ROSTK { first block ENTRY,
last block ROCODE };

//
place at end of FLASH { block ROSTK };

define block SNVSTK with fixed order { block APPKEYS,
block SNVSECT};

Note: As JXS suggested in the previous post you will need to access application_keys in order to prevent from being optimized out.

From the stack map file you can see the sections placed correctly:

"A1": 0x2040
SNVSTK 0x0001cfc0 0x2040 <Block>
APPKEYS 0x0001cfc0 0x40 <Block>
.appKeys const 0x0001cfc0 0x40 osal_snv_wrapper.o [2]
SNVSECT 0x0001d000 0x2000 <Block>
.snvSectors const 0x0001d000 0x2000 osal_snv_wrapper.o [2]
- 0x0001f000 0x2040

0 Thangaraj P33 over 8 years ago in reply to Sean2

Expert 1350 points

Thanks Sean. Its working for me as well. Thanks for your support.

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Starterware/CC2640R2F: Page alignment issue.