Part Number: CC2650
Here's my setup:
CC2650 7x7 VQFN48 is the chip I'm trying to program via the ROM bootloader.
I'm using a linux-based single-board computer (SBC) to drive the SPI bus to talk to the bootloader in the CC2650.
The DIO11 pin of the CC2650 is connected to the SBC and is used for both slave/chip select in SPI communication and to open up the bootloader backdoor (configured in BL_CONFIG:BL_PIN_NUMBER). DIO11 is configured to opens the backdoor when it's externally set low by my SBC during reset. About 500ms after reset, I set bootloader pin high again to enable the bootloader. Then I start using the same pin as chip select pin.
For some reason, after the SBC resets the CC2650, the MOSI pin of the SPI bus controlled by the bootloader goes high about 1ms after reset line goes high, but then goes low 10-20ms later about 90% of the time. When this happens, SPI communication with bootloader doesn't work (I don't get a response to the PING command). But in the other 10% of the time, when the MOSI line goes high and doesn't go low, bootloader communication works fine and I get an ACK.
Now, in both cases, SPI communication while sending the PING command looks absolutely identical in both cases on my logic analyzer (other engineers confirmed it) except for the fact that the MOSI line is set high when there are no clock transitions in the "ACK" scenario. So I'm wondering if there's a requirement in the bootloader for the SPI bus to set MOSI low in the idle state. Otherwise, I'll have to look for issues elsewhere in my setup.
MOSI goes high after reset and stays high:
MOSI goes high after reset, then goes low 13ms later:
MOSI starts high while the clock is still idle before the transmission, then returns back to high state after transmission is over (I get an ACK after this command is sent):
MOSI starts low before the transmission of the same command as above, then returns back to low state after transmission is over (this results in no response from bootloader):
Thank you!
Michael
