Other Parts Discussed in Thread: CC1350STK
I have I2C bus working on a CC2640 at 100khz, but only barely, since the rise time on the clock/data pulses is about 0.9 usec (spec says should be <1 usec).
I have two external I2C daughterboards (MP9250 IMU chip and PCA9685 PWM chip) on the SDA/SCL lines of my CC2640.
The only pullups in use are the internal ones of the CC2640.
I am unable to use 400khz fast mode due to the fact that the rise time of 0.9 usec is just too far from the spec max of 0.3 usec.
Fall times are good for both modes ~60 nsec.
If I look at SCL from the CC2640 without any attachment to other devices, the rise time is still 0.5 usec
My CC2640 is itself on a CC264BPA-S daughterboard and I am only running it at 2.8v.
This is my SDA/SCL pin assignment:
#define Board_I2C0_SCL0 IOID_12
#define Board_I2C0_SDA0 IOID_0
What can I do to fix this?
Thanks,
Dale


