Tool/software: Code Composer Studio
Hello,
I'm struggling to get the SysTick interrupts working on the CC2650. My goal is to setup a 1mS interrupt to use for system timing. I've started my project using the rfPacketRx example project and modified accordingly. Below are the functions I've created along with the modified Vector Map. At the moment, I can't get the call back (Interrupt Service Routine) to compile using the SysTickIntRegister() call. Can you help get me headed in the right direction?
Thanks,
Dan
//initialization function in the rfPacketrx.c file
void TickTimerInit(void){
SysTickDisable();
SysTickIntRegister(&TickTimerISR);
SysTickPeriodSet(48000); // 1mS interrupt timing
SysTickIntEnable();
SysTickEnable();
// HWREG(CPU_SCS_O_STCSR) = 0; //disable timer before configuring
// HWREG(CPU_SCS_O_STCSR) = 0x00000003; //enables timer and interrupt
// HWREG(CPU_SCS_O_STRVR) = 48000; //load counter register
// HWREG(CPU_SCS_NVIC_ISER0_SETENA14) = 1;//enable interrupt
} //end of void TickTimerInit(void){
//below vector map and ISR function are located in the startup_css.c file
extern void TickTimerISR(void);
#pragma DATA_SECTION(g_pfnVectors, ".intvecs")
void (* const g_pfnVectors[])(void) =
{
(void (*)(void))((unsigned long)&__STACK_END),
// The initial stack pointer
ResetISR, // The reset handler
NmiSR, // The NMI handler
FaultISR, // The hard fault handler
IntDefaultHandler, // The MPU fault handler
IntDefaultHandler, // The bus fault handler
IntDefaultHandler, // The usage fault handler
0, // Reserved
0, // Reserved
0, // Reserved
0, // Reserved
IntDefaultHandler, // SVCall handler
IntDefaultHandler, // Debug monitor handler
0, // Reserved
IntDefaultHandler, // The PendSV handler
TickTimerISR, // The SysTick handler
IntDefaultHandler, // AON edge detect
IntDefaultHandler, // I2C
IntDefaultHandler, // RF Core Command & Packet Engine 1
IntDefaultHandler, // AON SpiSplave Rx, Tx and CS
IntDefaultHandler, // AON RTC
UART0_ISR, // UART0 Rx and Tx
IntDefaultHandler, // AUX software event 0
IntDefaultHandler, // SSI0 Rx and Tx
IntDefaultHandler, // SSI1 Rx and Tx
IntDefaultHandler, // RF Core Command & Packet Engine 0
IntDefaultHandler, // RF Core Hardware
IntDefaultHandler, // RF Core Command Acknowledge
IntDefaultHandler, // I2S
IntDefaultHandler, // AUX software event 1
IntDefaultHandler, // Watchdog timer
IntDefaultHandler, // Timer 0 subtimer A
IntDefaultHandler, // Timer 0 subtimer B
IntDefaultHandler, // Timer 1 subtimer A
IntDefaultHandler, // Timer 1 subtimer B
IntDefaultHandler, // Timer 2 subtimer A
IntDefaultHandler, // Timer 2 subtimer B
IntDefaultHandler, // Timer 3 subtimer A
IntDefaultHandler, // Timer 3 subtimer B
IntDefaultHandler, // Crypto Core Result available
IntDefaultHandler, // uDMA Software
IntDefaultHandler, // uDMA Error
IntDefaultHandler, // Flash controller
IntDefaultHandler, // Software Event 0
IntDefaultHandler, // AUX combined event
IntDefaultHandler, // AON programmable 0
IntDefaultHandler, // Dynamic Programmable interrupt
// source (Default: PRCM)
IntDefaultHandler, // AUX Comparator A
IntDefaultHandler, // AUX ADC new sample or ADC DMA
// done, ADC underflow, ADC overflow
IntDefaultHandler // TRNG event
};
void TickTimerISR(void){
//clear interrupt
clk_ticks++; //1mS Counter Variable
} //end of void TickTimerISR(void){