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CCS/LAUNCHXL-CC2640R2: Software c code for TLV320AIC3109-Q1 audio codec

darshan29
Intellectual 355 points

Part Number: LAUNCHXL-CC2640R2

Tool/software: Code Composer Studio

Hi,

I am using custom board using CC2640R2 chip with TLV320AIC3109 audio codec. i have gone through latest SDK of CC2640R2.but i am not able to find TLV320AIC3109 audio codec c file to configure codec through i2c.

please help me to provide i2c register values for configuration of TLV320AIC3109.

Regards,

Darshan

  • 0
    Guru 735705 points
    I suppose you should read TLV320AIC3109 datasheet for register values.
  • 0
    TI__Mastermind 30250 points
    Darshan,

    I can provide you i2c register values for configuration of the AIC3109, but I need to know how you want it configured.

    best regards,
    -Steve wilson
  • 0 in reply to Steve-Wilson
    Intellectual 355 points

    Hi steve,

    I need below configuration.

    1. i2s - 16bit, 16KHz,mastermode

    2. audio pll clock for ADC,DAC

    3. audio mic and speaker enable and gain

    I am using below ble_examples as reference code.

    github.com/.../audiocodec.c

    Regards,

    Darshan

  • 0 in reply to darshan29
    TI__Mastermind 30250 points
    Darshan,

    I can't setup the PLL if I don't know your MCLK or BCLK frequency, whichever you are using to drive the PLL. please provide that info.

    Im not really setup to help you with your coding, I can help with codec register configurations only.

    best regards,
    -Steve wilson
  • 0 in reply to Steve-Wilson
    Intellectual 355 points
    Hi Steve,

    we need a 8MHz BCLK frequency . and we are not connecting MCLK . so we left it open.

    Regards,
    Darshan
  • 0 in reply to darshan29
    TI__Mastermind 30250 points
    Darshan,

    I should have realized this in my previous post, but because you have the codec in master mode ( meaning that it generates the BCLK and WCLK) the BCLK cannot be used to generate the clocks. you therefore must use MCLK.

    8MHz does not meet the PLL input requirements if the D coefficient is not 0. So your clks will have some error in there.
    if you can use an 8.192MHz clock instead, then you could get a solid 16Khz, but as it is, you will be running at 15.63Khz. is this an acceptable error?

    Register config:
    notation: (function)(device address in hex)(register address in hex)(data in hex)
    example: W 30 01 80 = (write)(to the device at address 30)(register 01)(80)


    w 30 01 80 # reset codec
    w 30 02 44 # divide FsRef by 3 to achieve 16khz sample rate
    w 30 03 90 # enable PLL
    w 30 04 30 # set J-Value to 12
    w 30 07 0a # setup DAC data path
    w 30 08 c0 # set device to master mode

    In order to setup an audio mic and output, I need to know which input and output you are using.

    best regards,

    -Steve wilson
  • 0 in reply to Steve-Wilson
    Intellectual 355 points

    Hi Steve,

    I am using mic1p,mic1m for mic and left_lop,left_lom for speaker.but if you can provide full configuration for all mic and speaker that would be much better.

    Regards,
    Darshan

  • 0 in reply to darshan29
    Intellectual 355 points

    Hi Steve

        i am using below code for config AIC3109 codec but i am not able to capture and play audio.

    if(codecId == AUDIO_CODEC_TI_3109)
        {
            AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);

            if(bitsPerSample == AUDIO_CODEC_16_BIT)
            {
                // Set I2S Mode and Word Length
                AudioCodecRegWrite(TI3109_AUDIO_IF_B_REG, 0x00);    // 0x00     16bit, I2S, BCLK is input to the device
                                                                    // WCLK is input to the device,
            }
            else
            {
                return -1;
            }

            bitClk = bitsPerSample * bitRate * noOfChannels;
            if(bitClk == 512000)
            {
                AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);

                AudioCodecRegWrite(TI3109_CLK_REG, 0x00);       // CODEC_CLKIN source selection. 0: CODEC_CLKIN uses PLLDIV_OUT 1: CODEC_CLKIN uses CLKDIV_OUT
                AudioCodecRegWrite(TI3109_SAMPLE_RATE_SEL_REG, 0x44);
                AudioCodecRegWrite(TI3109_PLL_PROG_A_REG, 0x90);
                AudioCodecRegWrite(TI3109_PLL_PROG_B_REG, 0x30);
                AudioCodecRegWrite(TI3109_DATAPATH_SETUP_REG, 0x0a);
                AudioCodecRegWrite(TI3109_SERIAL_IF_CTL_A_REG, 0xc0);
            }
            else
            {
                return -1;
            }

            if(speaker)
            {

                AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);    //Select Page 0

                AudioCodecRegWrite(TI3109_DAC_PWR_CTL_REG,0x80);    //DAC power on

                AudioCodecRegWrite(TI3109_DAC_OUT_SW_CTL_REG,0x0);    //DAC = DAC_1

                AudioCodecRegWrite(TI3109_DAC_VOL_CTL_REG,0x0);    //DAC not muted

                AudioCodecRegWrite(TI3109_PGA_LEFTLOP_VOL_CTL_REG,0x80);    //PGA to Left_LOP,left_LOM

                AudioCodecRegWrite(TI3109_PGA_LEFTLOP_VOL_CTL_REG,0x80);    //DAC_1 to Left_LOP,left_LOM

                AudioCodecRegWrite(TI3109_LEFTLOP_OUT_LEVEL_CTL_REG,0x09);    //DAC_1 to Left_LOP,left_LOM

                AudioCodecRegWrite(TI3109_PWR_STS_REG,0x90);    //DAC Left_LOP power on

                AudioCodecRegWrite(TI3109_CLK_REG,0x0);    //CODEC_CLKIN is PLLDIV_OUT

                AudioCodecRegWrite(TI3109_CLK_GEN_CTL_REG,0x0);    //CODEC_CLKIN and PLLCLK_IN is MCLK

            }


            if(mic)
            {
                AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);    //Select Page 0

                AudioCodecRegWrite(TI3109_PGA_GAIN_CTL_REG,0);    //Select Page 0

                AudioCodecRegWrite(TI3109_MIC1P_LINE1P_CTL_REG,0x84);    //micp/m differential add power up

                AudioCodecRegWrite(TI3109_MIC2P_LINE2P_CTL_REG,0x80);    //differential

                AudioCodecRegWrite(TI3109_MICBIAS_CTL_REG,0xc0);    //micbias to avdd

                AudioCodecRegWrite(TI3109_AGC_CTL_A_REG,0x80);    //AGC enable

            }

        }

  • 0 in reply to darshan29
    TI__Mastermind 30250 points

    Darshan,

    I have seen the AIC3254 code that you are referencing,  but can you share the AIC3107 code you created?

    have you checked to make sure your register definitions are correct?


            if(speaker)
            {

                AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);    //Select Page 0

                AudioCodecRegWrite(TI3109_DAC_PWR_CTL_REG,0x80);    //DAC power on

                AudioCodecRegWrite(TI3109_DAC_OUT_SW_CTL_REG,0x0);    //DAC = DAC_1

                AudioCodecRegWrite(TI3109_DAC_VOL_CTL_REG,0x0);    //DAC not muted

                AudioCodecRegWrite(TI3109_PGA_LEFTLOP_VOL_CTL_REG,0x80);    //PGA to Left_LOP,left_LOM

                AudioCodecRegWrite(TI3109_PGA_LEFTLOP_VOL_CTL_REG,0x80);    //DAC_1 to Left_LOP,left_LOM
                //****LINE ABOVE IS A REPEAT OF PREVIOUS LINE> IT DOES NOT CONNECT DAC_1 to LEFT LOP/M OUT

                AudioCodecRegWrite(TI3109_LEFTLOP_OUT_LEVEL_CTL_REG,0x09);    //DAC_1 to Left_LOP,left_LOM

                AudioCodecRegWrite(TI3109_PWR_STS_REG,0x90);    //DAC Left_LOP power on

                THE REGISTER ABOVE IS A READ ONLY REGISTER.   Register 86 contains the LEFT_LOP/M enable. (Bit 0)

     

    //   ***** PWR_STS_REG is read only


                AudioCodecRegWrite(TI3109_CLK_REG,0x0);    //CODEC_CLKIN is PLLDIV_OUT
                AudioCodecRegWrite(TI3109_CLK_GEN_CTL_REG,0x0);    //CODEC_CLKIN and PLLCLK_IN is MCLK

    The 2 register writes above, should be done BEFORE the ADC and DAC are powered up.  I would do it before the PLL is programmed.

            }

    regarding the (mic) portion:


            if(mic)
            {
                AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);    //Select Page 0

                AudioCodecRegWrite(TI3109_PGA_GAIN_CTL_REG,0);    //Select Page 0

                AudioCodecRegWrite(TI3109_MIC1P_LINE1P_CTL_REG,0x84);    //micp/m differential ADC power up

                AudioCodecRegWrite(TI3109_MIC2P_LINE2P_CTL_REG,0x80);    //differential

                AudioCodecRegWrite(TI3109_MICBIAS_CTL_REG,0xc0);    //micbias to avdd

                AudioCodecRegWrite(TI3109_AGC_CTL_A_REG,0x80);    //AGC enable  <--  You aren't programming any AGC coefficients... is this your intention?

            }

    I hope my comments are helpful.

    best regards,

    -Steve Wilson

  • 0 in reply to Steve-Wilson
    Intellectual 355 points

    Hi Steve,

    I have update my code as your comment but still i can't capture and play audio.

    below is code and i2c dump.

    please help me to find out what is wrong with it.

    /************************************************************************
     *
     * TLV320AIC3109 Codec
     *
     * **********************************************************************/
        if(codecId == AUDIO_CODEC_TI_3109)
        {
            AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);
     
            if(bitsPerSample == AUDIO_CODEC_16_BIT)
            {
                // Set I2S Mode and Word Length
                AudioCodecRegWrite(TI3109_SERIAL_IF_CTL_A_REG, 0x00);    // 0x00     16bit, I2S, BCLK is input to the device
                                                                    // WCLK is input to the device,
            }
            else
            {
                return -1;
            }
     
            bitClk = bitsPerSample * bitRate * noOfChannels;
            if(bitClk == 512000)
            {
                AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);
     
                AudioCodecRegWrite(TI3109_CLK_REG, 0x01);       // 0: CODEC_CLKIN uses PLLDIV_OUT 1: CODEC_CLKIN uses CLKDIV_OUT
                AudioCodecRegWrite(TI3109_CLK_GEN_CTL_REG,0xa0);    //CODEC_CLKIN and PLLCLK_IN is MCLK
     
                AudioCodecRegWrite(TI3109_SAMPLE_RATE_SEL_REG, 0x44);
                AudioCodecRegWrite(TI3109_PLL_PROG_A_REG, 0x90);
                AudioCodecRegWrite(TI3109_PLL_PROG_B_REG, 0x30);
                AudioCodecRegWrite(TI3109_DATAPATH_SETUP_REG, 0x0a);
                AudioCodecRegWrite(TI3109_SERIAL_IF_CTL_A_REG, 0xc0);
     
            }
            else
            {
                return -1;
            }
     
            if(speaker)
            {
     
                AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);    //Select Page 0
     
                AudioCodecRegWrite(TI3109_DAC_PWR_CTL_REG,0x80);    //DAC power on
     
                AudioCodecRegWrite(TI3109_DAC_OUT_SW_CTL_REG,0x0);    //DAC = DAC_1
     
                AudioCodecRegWrite(TI3109_DAC_VOL_CTL_REG,0x0);    //DAC not muted
     
                AudioCodecRegWrite(TI3109_PGA_LEFTLOP_VOL_CTL_REG,0x80);    //PGA to Left_LOP,left_LOM
     
                AudioCodecRegWrite(TI3109_DAC_LEFTLOP_VOL_CTL_REG,0x80);    //DAC_1 to Left_LOP,left_LOM
     
                AudioCodecRegWrite(TI3109_LEFTLOP_OUT_LEVEL_CTL_REG,0x09);    //DAC_1 to Left_LOP,left_LOM
     
            }
     
     
            if(mic)
            {
                AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);    //Select Page 0
     
                AudioCodecRegWrite(TI3109_PGA_GAIN_CTL_REG,0);    //Select Page 0
     
                AudioCodecRegWrite(TI3109_MIC1P_LINE1P_CTL_REG,0x84);    //micp/m differential add power up
     
                AudioCodecRegWrite(TI3109_MIC2P_LINE2P_CTL_REG,0x80);    //differential
     
                AudioCodecRegWrite(TI3109_MICBIAS_CTL_REG,0x86);    //micbias to 2.5v
     
            }
            
            AudioCodecRegWrite(TI3109_PWR_STS_REG,0x0);    //checking power status
     
        }
        
        // Speaker volume control  
            AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);
            AudioCodecRegWrite(TI3109_DAC_VOL_CTL_REG, 0xff);
            AudioCodecRegWrite(TI3109_PGA_LEFTLOP_VOL_CTL_REG, vol);
            AudioCodecRegWrite(TI3109_DAC_LEFTLOP_VOL_CTL_REG, vol);
     
        // mic volume control  
            AudioCodecRegWrite(TI3109_PGA_GAIN_CTL_REG,0x7f);
     
       

    [info] address value

    [I2C Write] 0 0
    [I2C READ]  0 0
    [I2C Write] 1 80
    [I2C READ]  1 0
    [I2C Write] 0 0
    [I2C READ]  0 0
    [I2C Write] 8 0
    [I2C READ]  8 0
    [I2C Write] 0 0
    [I2C READ]  0 0
    [I2C Write] 65 1
    [I2C READ]  65 1
    [I2C Write] 66 a0
    [I2C READ]  66 a0
    [I2C Write] 2 44
    [I2C READ]  2 44
    [I2C Write] 3 90
    [I2C READ]  3 90
    [I2C Write] 4 30
    [I2C READ]  4 30
    [I2C Write] 7 a
    [I2C READ]  7 a
    [I2C Write] 8 c0
    [I2C READ]  8 c0
    [I2C Write] 0 0
    [I2C READ]  0 0
    [I2C Write] 25 80
    [I2C READ]  25 80
    [I2C Write] 29 0
    [I2C READ]  29 0
    [I2C Write] 2b 0
    [I2C READ]  2b 0
    [I2C Write] 51 80
    [I2C READ]  51 80
    [I2C Write] 52 80
    [I2C READ]  52 80
    [I2C Write] 56 9
    [I2C READ]  56 9
    [I2C Write] 0 0
    [I2C READ]  0 0
    [I2C Write] f 0
    [I2C READ]  f 0
    [I2C Write] 13 84
    [I2C READ]  13 84
    [I2C Write] 15 80
    [I2C READ]  15 80
    [I2C Write] 25 86
    [I2C READ]  25 80
    [I2C Write] 5e 0
    [I2C READ]  5e 90
    [I2C Write] 0 0
    [I2C READ]  0 0
    [I2C Write] 2b ff
    [I2C READ]  2b ff
    [I2C Write] 51 80
    [I2C READ]  51 80
    [I2C Write] 52 80
    [I2C READ]  52 80
    [I2C Write] 0 0
    [I2C READ]  0 0
    [I2C Write] f 7f
    [I2C READ]  f 7f


    Regards,
    Darshan

  • 0 in reply to darshan29
    TI__Mastermind 30250 points

    Darshan,

    You changed your configuration:

           bitClk = bitsPerSample * bitRate * noOfChannels;

           if(bitClk == 512000)

           {

               AudioCodecRegWrite(TI3109_PAGE_SEL_REG,0);

               AudioCodecRegWrite(TI3109_CLK_REG, 0x01);       // 0: CODEC_CLKIN uses PLLDIV_OUT 1: CODEC_CLKIN uses CLKDIV_OUT

               AudioCodecRegWrite(TI3109_CLK_GEN_CTL_REG,0xa0);    //CODEC_CLKIN and PLLCLK_IN is MCLK  BCLK

               AudioCodecRegWrite(TI3109_SAMPLE_RATE_SEL_REG, 0x44);

               AudioCodecRegWrite(TI3109_PLL_PROG_A_REG, 0x90);

               AudioCodecRegWrite(TI3109_PLL_PROG_B_REG, 0x30);

               AudioCodecRegWrite(TI3109_DATAPATH_SETUP_REG, 0x0a);

               AudioCodecRegWrite(TI3109_SERIAL_IF_CTL_A_REG, 0xc0);

           }

    Another confusing issue is that you told me that you wanted the device in Master mode (meaning the CODEC drives the WCLK and BCLK,  but in your CODE it says that BCLK and WCLK are inputs to the codec.  So which is it?

    -Steve

  • 0 in reply to darshan29
    Intellectual 355 points
    Hi Steve,

    Now audio codec is working correctly. but we have given micbias externally . by i2c register , we can not bias mic. it gives 0v on micbias pin.

    below i2c register we tried for micbias.

    1. AudioCodecRegWrite(TI3109_MICBIAS_CTL_REG,0x46); //micbias to 2v

    2. AudioCodecRegWrite(TI3109_MICBIAS_CTL_REG,0x86); //micbias to 2.5v

    3. AudioCodecRegWrite(TI3109_MICBIAS_CTL_REG,0xc6); //micbias to AVDD

    Thanks,
    Darshan
  • 0 in reply to darshan29
    TI__Mastermind 30250 points
    Darshan,

    could it be that your MICBIAS_CTL_REG definition is wrong? your register dump you supplied doesn't show any reads or writes to register 0x19 (register 25) but there is a register write to register 0x25.

    best regards,
    -Steve Wilson
  • 0 in reply to Steve-Wilson
    TI__Mastermind 30250 points
    Note that register 0x25 does need to be written to in order to power up the DAC. but the value would be 0x80, not 0x86

    best regards,
    -SteveWilson