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CC2640R2F: GPIO Port pin characteristics: Strange rise time on digital input

Part Number: CC2640R2F
Other Parts Discussed in Thread: CC2640

Hy,

I am observing a very strange effect which I have no explanation for. I have the following schematic:

The DIO 5 (and DIO6) shall control the input pin of a 2nd controller (STM32) which is also controlled by an output of a bus transceiver. This is necessary because I need to control the state of the Pin PB8 during boot: It must be 0 during reset and be controlled by the bus transceiver during normal operation.

When I look at the signal left and right of the Resistor R205 I see some sort of a huge capacitance:

  

So the digital signal has a rise time of about 2.5us. There must be an input capacitance of some hundreds pF somewhere.

Is there any explanation in the CC2640 that could explain this issue? Do the JTAG pins behave in a special way? I do not use JTAG nor have I a debugger connected. How do I need to configure the pin to be high impedant / low capacitant?

When I do connect my debugger and look into IO configuration I see the following:

Anything peculiar?

Best regards

Harald

  • All the DIOs on CC2640R2 is high-z before set according to the board file during boot (of CC2640)

    You write that you need to control the pin during boot, boot of CC2640R2 or STM32?
  • Hy,

    thanks for the very quick response. The CC2640 is the "master" controller and needs to control reset and boot pin of STM during start up. After startup, the bus transceiver shall take over the control of the pin.

    Therefore I defined all necessary pins in BoardGpioInitTable:

    #define Board_5XD_CANA_RESET                    IOID_2
    #define Board_5XD_CANB_RESET                    IOID_3
    #define Board_5XD_CANA_BOOT                     IOID_5
    #define Board_5XD_CANB_BOOT                     IOID_6
    
    const PIN_Config BoardGpioInitTable[] =
    {
        Board_5XD_CANA_RESET | PIN_GPIO_OUTPUT_EN | PIN_GPIO_HIGH | PIN_OPENDRAIN | PIN_PULLUP,                   /* CAN reset is not pulled */
        Board_5XD_CANB_RESET | PIN_GPIO_OUTPUT_EN | PIN_GPIO_HIGH | PIN_OPENDRAIN | PIN_PULLUP,                   /* CAN reset is not pulled */
    
        Board_5XD_CANA_BOOT | PIN_GPIO_OUTPUT_DIS | PIN_INPUT_DIS | PIN_NOPULL | PIN_PUSHPULL,                    /* CAN Rx is left floating */
        Board_5XD_CANB_BOOT | PIN_GPIO_OUTPUT_DIS | PIN_INPUT_DIS | PIN_NOPULL | PIN_PUSHPULL,                    /* CAN Rx is left floating */
    }

    During startup I guarantee the proper boot order by

        PINCC26XX_setOutputEnable(Board_5XD_CANA_RESET, 1);
        PINCC26XX_setOutputEnable(Board_5XD_CANA_BOOT, 1);
        PINCC26XX_setOutputEnable(Board_5XD_CANB_RESET, 1);
        PINCC26XX_setOutputEnable(Board_5XD_CANB_BOOT, 1);
    
        PINCC26XX_setOutputValue(Board_5XD_CANA_RESET, 0);
        PINCC26XX_setOutputValue(Board_5XD_CANA_BOOT, 0);
        PINCC26XX_setOutputValue(Board_5XD_CANB_RESET, 0);
        PINCC26XX_setOutputValue(Board_5XD_CANB_BOOT, 0);
        delay_ms(20);
        PINCC26XX_setOutputValue(Board_5XD_CANA_RESET, 1);
        PINCC26XX_setOutputValue(Board_5XD_CANB_RESET, 1);
        delay_us(200);
        PINCC26XX_setOutputValue(Board_5XD_CANA_BOOT, 1);
        PINCC26XX_setOutputValue(Board_5XD_CANB_BOOT, 1);
        delay_ms(20);
        PINCC26XX_setOutputEnable(Board_5XD_CANA_BOOT, 0);
        PINCC26XX_setOutputEnable(Board_5XD_CANB_BOOT, 0);
        delay_ms(2);
    

    These signals look good on oscilloscope, but then, there seems to be a high capacitance on pins Board_5XD_CANA_BOOT and Board_5XD_CANB_BOOT that destroys the digital signal coming from the receiver.

    What is the recommended way to disable digital output pins after the startup phase?

    Regards

    Harald

  • Have you tested to set the pin back to high-z instead of setting the pin as output and drive the pin after boot?
  • How would I do this?
  • If you look in dev.ti.com/.../_p_i_n_8h.html

    And scroll down to Input Mode Options you will see which options you have to use to get to default mode which is tristate.