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RTOS/CC2652R: SPI Slave without CS

Part Number: CC2652R

Tool/software: TI-RTOS

Hello,

I am using the cc2652 as an SPI Slave device. If there is no chip select used for this, then would there be any issues with the clock. Would there be a possibility for glitches to appear at the clock provided by the Master ? 

P.S There is only a single slave device being used in this SPI communciation.

Regards,

Shyam

  • Hi Shyam,

    I would not expect glitches in this case, you are however limited to the frame format you can use as some of them expect the CS signal.
  • Hi M-W,

    Thanks again for your reply.

    The reason I had asked if there would be any glitches on the clock is because when I try to transfer data, say like every 3 seconds I transfer maybe 10bytes or so, there is the occasional instance( 3 out of 500, maybe) that the received data appears to be shifted by some bits ( at times maybe by a complete byte). When I performed a general search there were some sources I came across where it had been mentioned of chances for clock glitches when not using the chip select. Since you had mentioned that such glitches will not occur, Would you be able to know what might be causing this occasional faulty behaviour?


    Thanks & Regards,

    Shyam
  • Hi Shyam,

    Note that while I do not expect the device itself to generate these glitches, I would recommend you try to trace your lines for a longer period of time of possible and see if you can find any clock glitches in these cases.

    The fact that it should not glitch is not the same as it might glitch, this could be due to multiple reasons such as the way you connect the two devices and the environment around them. Using a CS typically guards you against spontaneous glitches as the device need CS to be active to care about the clock.