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RTOS/CC2652R: Disabling GAPBONDMGR

Shyam Shankar79
Expert 2330 points
Part Number: CC2652R

Tool/software: TI-RTOS

Hello,

I am working on project using the Ble_Multi_Role example as the code base. The cc2652 also acts as an SPI Slave in the same.

I wanted to disable the GAP Bond Manager in the project. I tried commenting out -DGAP_BOND_MGR in the build_config.opt file in the associated ble_multi_role_stack_library. But when I do so, the initial SPI transfers that are done, become corrupted/bits get shifted. It seems really odd, since the GAP BOND MGR has nothing to do with the SPI clock I believe and also the subsequent transfers after the first few are all correctly gotten. Why is that? Does not including the GAP_BOND_MGR in anyway affect the SPI Clock ? 

Regards,

Shyam

  • 0
    TI__Guru* 81311 points
    Hi Shyam,

    WHat version of the SimpleLink CC26x2 SDK are you using?

    What is the SPI peer device?
  • 0 in reply to Marie H
    Expert 2330 points
    Hello,
    The sdk version is "simplelink_cc26x2_sdk_2_20_00_36".
    The SPI Peer device is an AR9344, that acts as the SPI Master.

    Regards,
    Shyam
  • 0 in reply to Shyam Shankar79
    TI__Guru 56590 points
    That sounds very odd. GAP_BOND_MGR should not relate to SPI. Have you compared the operation and analyzed the traffic with an logic analyzer both with and without -DGAP_BOND_MGR in build_config.opt?
  • 0 in reply to Eirik V
    Expert 2330 points
    I dont think there is any change in the traffic with or without the BOND MGR. Especially since at the initial stage of the program the same data transfers are performed always.
  • 0 in reply to Shyam Shankar79
    Expert 2330 points
    Hello,
    I had included a code to initialize UART1 of the cc26xx as well. And this too seems to be affecting the initial spi transfers.

    Regards,
    Shyam
  • 0 in reply to Shyam Shankar79
    TI__Guru 56590 points
    Does it work without the UART1 Initialization?
    Have you tried to run a SPI standalone TI-RTOS project to verify your desired functionality?
    Have you connected a logic analyzer to verify what is actually sent from the Master?
  • 0 in reply to Eirik V
    Expert 2330 points
    Yes it does work fine without the uart1 initialization.
    Yes the SPI was verified standalone and the data was verified multiple times using the logic analyzer as well.

    Regards,
    Shyam
  • 0 in reply to Shyam Shankar79
    TI__Guru 56590 points
    Can you show me your UART initialization?
    Where do you init SPI and where do you init UART?
  • 0 in reply to Eirik V
    Expert 2330 points

    Hello,
    In my project I have 2 tasks - multi_role_task and another spi_task.
    I have initialized the UART1 and the SPI in the spi_task (which has the higher prority)

    static void spi_taskFxn(UArg a0, UArg a1)
    {
    uint16_t rcvdLen = 0;
    uint32_t events;
    uint32_t remData;

    syncEventSpi = Event_create(NULL, NULL);
    spiTaskQueueHandle = Util_constructQueue(&spiTaskMsg);

    Semaphore_Params_init(&semaphoreParams);
    pairSpiSem = Semaphore_create(0,&semaphoreParams, NULL);
    spiSDoneSem = Semaphore_create(0,&semaphoreParams, NULL);
    spiSDataSem = Semaphore_create(0,&semaphoreParams, NULL);
    spiRDoneSem = Semaphore_create(0,&semaphoreParams, NULL);

    // Open Display
    dispHandle = Display_open(Display_Type_UART, NULL);
    spiQueueHandle = Queue_create(NULL, NULL);
    passThruQueueHandle = Queue_create(NULL, NULL);

    The code is as follows :-
    /* Call driver init functions. */
    GPIO_init();
    ClockP_usleep(100000);
    SPI_init();
    PIN_setOutputValue(buttonPinHandle, WISE_SPI_GPIO_IND, false);
    // SPI Initialize Fxn
    wiseSpiInit(Board_SPI1, SPI_MODE_CALLBACK);
    ClockP_usleep(100000);
    while(SSIDataGetNonBlocking(SSI1_BASE, &remData));
    wiseSpiTransfer(INIT_DUMMY, INIT_DUMMY_LEN, spiInitDummyData);

    UART_Params_init(&nfcUartParams);
    nfcUartParams.writeDataMode = UART_DATA_BINARY;
    nfcUartParams.readDataMode = UART_DATA_BINARY;
    nfcUartParams.readReturnMode = UART_RETURN_FULL;
    nfcUartParams.readMode = UART_MODE_CALLBACK;
    nfcUartParams.readEcho = UART_ECHO_OFF;
    nfcUartParams.readCallback = nfcUartCallback;
    nfcUartParams.baudRate = 115200;
    nfcUart = UART_open(Board_UART1, &nfcUartParams);
    if (nfcUart == NULL)
    {
    Display_printf(dispHandle, displLine++, 0, "Uart NFC not initialized");
    while (1);
    }
    UART_readCancel(nfcUart);
    UART_read(nfcUart, nfcData, nfcDataLen);

    Regards,
    Shyam

  • 0 in reply to Shyam Shankar79
    TI__Guru 56590 points
    Hello Shyam,
    As these peripherals reside in the same power domain there could be issues with UART power management conflicts on pre-release SDK versions. Please try to reproduce this on the latest SDK on release silicon (E).
  • 0 in reply to Eirik V
    Expert 2330 points

    Hello,

    I think I’ve got it to work. What I did was I changed the dmatfrsize to 10 in the cc26x2r1launch.c file. It was previously set to 1. Now even though I have used Uart and have disabled gap bond mgr, the corruption at the spi transfers seem to be not present.

    Would you be able to please tell me how changing the dmatrfrsiZe would have caused this change?

    I would be more assured if I knew how this had been resolved by changing the dmatrfrsize

    Regards,

    Shyam

  • 0 in reply to Shyam Shankar79
    TI__Guru 56590 points
    Hello Shyam,
    Nice job.
    In the latest SDK this parameter is called minDmaTransferSize, a threshold used to decide to use polling instead of DMA when the transfer is less than 10 bytes. I am not sure what happens, but For a few bytes, in discrete transfers, the DMA setup in SPI driver add a lot of overhead, increasing the overall latency of the system. What are the SPI transfer parameters? Rate/frequency, number of bytes, etc.