Tool/software: Code Composer Studio
Hello all,
I'm attempting to create a hardware timer and output said timer on a pin by modifying the registers. I'm following the steps detailed in the technical reference manual as shown:
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1. To use a GPT module, enable the peripheral domain and the appropriate GPT module in the PRCM by
* writing to the PRCM:GPTCLKGR, the PRCM:GPTCLKGS, and the PRCM:GPTCLKGDS registers, or
* by using the following driver library functions:
* PRCMPeripheralRunEnable(uint32_t, ui32Peripheral)
* PRCMPeripheralSleepEnable(uint32_t, ui32Peripheral)
* PRCMPeripheralDeepSLeepEnable(uint32_t, ui32Peripheral)
2. Next, load the setting to the clock controller by writing to the PRCM:CLKLOADCTL register
3. Configure the IOC module to route the output from the GPT module to the IOs.
and also:
The GPTM is configured for one-shot and periodic modes by the following sequence:
1. Ensure the timer is disabled (clear the GPT:CTL TnEN register bit) before making any changes.
2. Write the GPTM Configuration Register (GPT:CFG) with a value of 0x00000000.
3. Configure the GPTM Timer n Mode Register (GPT:TnMR) TnMR field:
(a) Write a value of 0x1 for one-shot mode.
(b) Write a value of 0x2 for periodic mode.
4. Optionally, configure the GPT:TnMR TnSNAPS, TnWOT, TnMTE,and TnCDIR register bits to select whether to capture the value of the free-running timer at time-out,use an external trigger to start counting,configure an additional trigger or interrupt,and count up or down.
5. Load the start value into the GPTM Timer n Interval Load Register (GPT:TnILR).
6. If interrupts are required,set the appropriate bits in the GPTM Interrupt Mask Register (GPT:IMR).
7. Set the GPT:CTLTnEN register bit to enable the timer and start counting.
8. Poll the GPT:MRIS register or wait for the interrupt to be generated(if enabled). In both cases,the status flags are cleared by writing a 1 to the appropriate bit of the GPTM Interrupt Clear Register (GPT:ICR)
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A bit of pseudo-code for what I have:
#define PRCM_CLKLOADCTL 0x40082028 // Clock load control register
#define GPT0_CTL 0x4001000C // GPTM Control Register
#define GPT0_CFG 0x40010000 // GPTM Configuration Register
#define GPT0_TAMR 0x40010004 // Timer A Mode Register
#define GPT0_TAILR 0x40010028 // Timer A Load Interval Register
#define GPT0_ACAPTSEL 0x40083200 // Output selection register for GPT0
#define GPT0_TAMATCHR 0x40010030 // Timer A register match value
#define IOC_DIO8 0x40081020 // Physical Address of DIO8
void timerStuff()
{
// Steps to enable the GPT module peripheral
PRCMPeripheralRunEnable(PRCM_PERIPH_TIMER0); // Enables TIMER0 in Run mode
PRCMPeripheralSleepEnable(PRCM_PERIPH_TIMER0); // TIMER0 continues during processor sleep
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_TIMER0); // TIMER0 continues during processor deep-sleep
/* 2. Next, load the setting to the clock controller by writing to the PRCM:CLKLOADCTL register */
HWREG(PRCM_CLKLOADCTL) = 0x00000001; // Load settings to the clock controller
HWREG(GPT0_CTL) |= 0x00000000; // Disable Timer A
HWREG(GPT0_CFG) |= 0x00000000; // Configure the timer to 32 bits
HWREG(GPT0_TAMR) |= 0x00000012; // Timer A is periodic (last 4 bits) and counts up (second to last 4 bits)
HWREG(GPT0_TAILR) = 0; // Start the timer at 0
HWREG(GPT0_TAMATCHR) = 480; // Load match value
HWREG(GPT0_ACAPTSEL) |= 0x00000055; // Sets GPT0 as a port event
HWREG(IOC_DIO8) |= 0x00000017; // Sets DIO8 as an event port
HWREG(GPT0_CTL) |= 0x00000001; // Enables Timer A to start running
}
My code will compile, but I am unable to see the timer output on the desired pin. I'm unsure if my issue is with the order I am writing to the registers, or if I'm setting the output on the pin wrong. Any assistance would be greatly appreciated.
Thanks for your time.
Best,
Nick
