CC2642R: Boot up power sequence timing requirement....

Not sure if I understand the connection here. Does the CC2642R see 4.4 V (which is above maximum rating for the chip)? 

Could you provide a plot showing VDDS to the CC2642R at boot-up? 

Dear SIr:

    Our system have LDO regulator between 4.4V to 3.3 V for CC2642R. I try to use manual reset event in pin 35 (Reset_N), but it still boot failed..

    Best Regards.

Ting  2020/01/19

Could you provide a plot showing VDDS to the CC2642R at boot-up in addition to VDDR and reset_n? 

Hi:

     Please see following photo for your reference:

I still try to solve this issue, if you have other suggestions,please let me know.

Best Regards.

Ting  2020/01/20

I don't see anything on this plot that should cause abnormal behavior. 

How do you see "But the CC2642R boot failed."?

If you add turning on a LED (or setting a DIO) as one of the things you do in the code, does the DIO get set high? 

Hi 

  Our system boot failed mean that BLE can't scan in tablet or mobile phone....

   Normally Reset_N signal keep low after VDDS and VDDR, This will help if I try to delay "Reset_N" time....

Best Regards.

Ting  2020/01/21

If you add turning on a LED (or setting a DIO) as one of the things you do in the code, does the DIO get set high? 

Hi 

  For our system is "Global LDO mode" and without 32.768Khz. Do we need to modify "boot code" setting....?

   Or the"analog startup" also need to check....

Best Regards.

Ting  2020/01/21

If you mean the CCFG, yes, you have to change this to reflect that you use GLDO and internal RCOSC.