Tool/software: Code Composer Studio
Hi,
I have LAUNCHXL-CC26X2R1 boards with CCS v9.1.0 and I am using the simplelink_cc13x2_26x2_sdk_3_10_01_11 SDK for project.
I am working on the Simple Peripheral application and have modified the project so it can supports the BIM. In the BIM project, I am trying to calibrate the XOSC_LF clock.
Right now, I have turn off RCOSC_LF clock with statically configuring the Power Manager configuration object. I have included SET_CCFG_MODE_CONF_SCLC_LF_OPTION 0x03 for LF RCOSC in the ccfg area. In the main, at first I tried to request XoscLf to use TdcRef as shown below :
// Select XOSC_LF as TDC_REF clock source HWREGH( AUX_DDI0_OSC_BASE + DDI_O_SET + DDI_0_OSC_O_CTL0 ) = ( 3 << DDI_0_OSC_CTL0_ACLK_REF_SRC_SEL_S ); // Must sync twice to let TDC_REF setting propagate before requesting it HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ) = 1 ; HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // Enable the TDC_REF clock request HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_TDCREFCLKCTL ) = AUX_SYSIF_TDCREFCLKCTL_REQ ;
Then I check if the TdcRef Clk Ready:
IsTdcRefClkReady( void ) { //if ( HWREG( AUX_WUC_BASE + AUX_WUC_O_REFCLKCTL ) & AUX_WUC_REFCLKCTL_ACK ) { if ( HWREG( AUX_SYSIF_BASE + AUX_SYSIF_O_TDCREFCLKCTL ) & AUX_SYSIF_TDCREFCLKCTL_ACK ) { return ( 1 ); } return ( 0 ); }
If I ran this sequence through the CCS debug session, it works fine and I am able to run the Simple Peripheral application after BIM.
But if do the hard reset on the board after downloading the program or closing the debug session, it stuck in the IsTdcRefClk() i.e. it always return 0.
I tried debug session to read the register value, there IsTdcRefClk() return 1 i.e. AUX_SYSIF_TDCREFCLKCTL_ACK is getting set in the AUX_SYSIF. Because of this I am unable to figure out why it is behaving like that when debug session is close.
Can you explain why it behaving like that? Let me know what you think.
Regards,
Shiv