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DLP-7970ABP: TRF7970A Initialization and Write/Read registers via SPI

Part Number: DLP-7970ABP
Other Parts Discussed in Thread: TRF7970A,

Hello all,

I am facing some problems with the initialization of the TRF7970A as well as reading and writing to the registers.

I am using the TRF7970 Booster Pack (Part No: DLP-7970ABP) with a Nordic controller (nRF5340DK). After having configured all SPI pins (clock, slave select, MOSI and MISO), I am trying to communicate with the TRF7970A device but somehow I cannot receive any information.

I will try to describe all the steps I followed:

First of all, I have initialized the TRF7970A as described in Section 6.11 of the Data Sheet:

  1. Raise SS and EN after 4 ms. I did not raise EN2, as this is not done in the Reader/Writer application provided by TI (which I successfully tested on my TI Launchpad).
  2. Issue a Software Initialization Direct Command (0x03 -> SPI MOSI: 0x83), followed by an Idle direct command (0x00 -> SPI MOSI: 0x80)
  3. 1 ms delay
  4. Issue a Reset FIFO direct command (0x0F -> SPI MOSI: 0x8F)
  5. Write the Modulator and SYS_CLK Control register (0x09) with the apropriate application specific setting for the crystal and system clock settings. I wrote 0x01 to the register but I do not really know what should I write here.
  6. Write the regulator and I/O control register (0x0B) with the appropriate application-specific setting. I wrote 0x00 to the register but I am not sure about that one either.
  7. Write NFC Target Detection Level register (0x18) with value 0x00. MOSI SPI: 0x18 0x00

I have used a Logic Analyzer to view the SPI information and I have summarized my results in the following table

As you can see in the table, the TRF7970A receives information over SPI-MOSI (initialization and some read/write commands) but the data that sends back over SPI-MISO does not really look correct. I can confirm that the "random" values like 0x02 and 0x14 sent over SPI-MISO come from the TRF7970A, as I do not receive them when I remove the TRF7970A from the SPI-pins of my controller.
Being this said, I have a few question about the SPI communication:

  1. What does the value 0x02 mean after the Idle direct command and the FIFO reset?
  2. What does the value 0x14 mean when I write to the Modulator and SYS_CLK Control Register?
  3. In step 7 I write 0x21 to the register 0x00. In step 8 I read that register but the information I receive is 0x00. Why cannot I read the value I just wrote?
  4. In step 9 i perform a dummy read. Why is here as well the received information 0x00?
  5. Could this be an issue related to steps 5 and 6 of the initialization, where I did not know which values to write to the register?

Looking forward to your feedback.

Many thanks in advance!

  • Hello JBF,

    Your SPI clock polarity and phase is incorrect. The TRF7970A only operates in SPI Mode 0 which is SPI Clock Low + Falling Edge data capture.

    Please resolve that first and then see how the system works. The incorrect values received are due to your SPI settings where the device is getting the wrong commands.

    Best Regards,

    Ralph Jacobi

  • Hello Ralph,

    thanks for your answer.

    "The TRF7970A only operates in SPI Mode 0 which is SPI Clock Low + Falling Edge data capture"

    -> I am a bit confused with that sentence. As far as I know, in Mode 0 data is sampled on rising edge and shifted out on the falling edge. When you say "falling edge data capture", capture refers to shifted out? Otherwise it should say rising edge data capture, right?

    I changed the SPI Mode to 0 (CPOL=0, CPHA=0). Unfortunately I still do not receive any information except when I try to read and write to register 0x00. In this case the data does not look correct either.

    Software initialization direct command:


    Trying to write 0x21 to register 0x00:


    Some other information about my setup:

    - Pin EN2 tied to ground

    - Pin IO0 tied to ground. Pins IO1 and IO2 tied to Vdd

     

    Best regards.

  • Hello JBF12,

    I must apologize! I've not supported this device for a while but our usual support engineer is on vacation so I am filling in. I was mistaken about SPI Mode 0, it should be SPI Mode 1 for Falling Edge Capture.

    To be explicit in terms of the SPI bus itself, the clock polarity should be the clock idles on logic '0' and the data changes on rising edge and latches on falling edge - looking at SPI modes, that is actually Mode 1.

    See below as an example SPI capture:

    Best Regards,

    Ralph Jacobi

  • Hello Ralph,

    I set the SPI Mode 1 but it still looks like the communication does not work.

    I will try to summarize my Initialization steps, in case I did something wrong:

    1) Start program execution

    2) 2ms delay before raising SS (as depicted in Figure 6.3 of the Data Sheet)

    3) Set SS to high

    4) 4 ms delay

    5) Set EN to high (EN2 is already tied to ground by hardware)

    6) 10ms delay, as suggested in this discussion

    7) Issue Software Initialization direct command : MOSI 0x83, MISO 0x00

    8) Issue Idle direct command: MOSI 0x80, MISO 0x00

    9) 1 ms delay to fully process the soft reset

    10) I try to read some registers to check that both the SOFT_INIT and IDLE direct commands were successful (I compare values with Table 2 of this document)

    10.1) Read Chip Status Control register: MOSI 0x41 and MISO 0x00 (should be 0x01)

    10.2) Read Regulator and I/O Control register: MOSI 0x4B and MISO 0x00 (should be 0x87)

    (Am I right to assume that if step 10 is not successful, the SPI communication between the controller and the TRF7970A is not working properly? Even in that case, I continue with the initialization steps)

    11) Reset FIFO direct command: MOSI 0x8F, MISO 0x00

    12) Write modulator and SYS_CLK control register: MOSI 0x09 0x01, MISO 0x00 0x00

    13) Write regulator and I/O control register: MOSI 0x0B 0x01, MISO 0x00 0x00

    14) Write NFC Target Detection Level register: MOSI 0x18 0x00, MISO 0x00 0x00

    15) Write value 0x21 to register 0x00: MOSI 0x00 0x21, MISO 0xFF 0xFF

    16) Read value written MOSI 0x40, MISO 0xFF

    Do you see something wrong in the initialization steps? I am particularly curious about the 0xFF MISO values in steps 14 and 15. I am not quite sure either about the values written in steps 12 and 13.

    Some other information:

    - SPI clock frequency: 4 MHz

    - Input Voltage: 2.9 V.
      I assume it should be enough, as the data sheet defines 2.7V as minimal input voltage. Also, I tried yesterday with 3.3 V 
      (with SPI Mode 0) and the results were the same as with 2.7 V.

    - IRQ not configured.

    Best regards.

  • Hello JBF12,

    The initial setup steps are okay, but I see the next issue here - let's see if that's the last big one or not. While SPI is full duplex, the process of communicating with the TRF7970A is half-duplex in nature. This is because the register reads and such need to be sent entirely for the TRF7970A to know what to send back. So after sending the command to read a register, then the Master must trigger clock cycles for the TRF7970A to send the data back.

    Compare these two screenshots here to see what I mean:

    SS lowered, read command sent, no extra clock cycles, SS raised

    SS lowered, read IRQ register command sent, second set of clock cycles initiated, TRF7970A returns data on MISO, then SS raised.

    I believe that should get the data going well.

    I don't think the SPI voltage level should be an issue. If you are operating the TRF7970A in 3V mode, you can also keep Regulator Control lower in setting and that would have VDD_I/O closer to 2.9V as well.

    4MHz SPI clock is okay but if you continue to have issues maybe try 2MHz to start - that said I highly doubt that is affecting anything here, it's more a procedural issue from what I see.

    You will need to configure IRQ at some point, but for initial register communication that isn't relevant. You are going to want IRQ for actual RF communication though.

    Best Regards,

    Ralph Jacobi

  • Hello Ralph,

    thanks for your observation about SPI being half-duplex!! It made me fully realize how to properly implement the reading process.
    I was somewhat expecting the slave to generate the clock for the MISO values, which is not how the SPI protocol works... Obviously this is the master´s responsibility.

    I can now read the values of the registers after the initialization, modify their value and perform continous read/write processes.

    For example, I write a certain value (0x35) to a certain register (0x02):

    To read the value of that register, the master sends the single address register read word AND creates another clock cycle while SS stays low. Only then, the slave can answer and send the data to the master over MISO.
    I noticed that in my case, the MOSI line stays high while the slave sends data to the master (which is fine, as the requirement is that there are no transitions). I guess that this is defined by the used SPI driver.

    Now I can dive into the RF communication Slight smile

    Best regards.