Hi,I am using CC1101 with atmega8 for an application where i need to save power by putting atmega8 in power down mode(0.5uA) and cc1101 in sleep mode(<1uA).When I configured the atmega in normal mode and cc1101 in idle mode,i found the total current drawn by the two to be 3.6mA(by connecting an ammeter to common vcc line).Whereas,when i put atmega8 in power down and cc1101 in sleep,i found the current drawn to reduce only to 1.78 mA,not in microamps as i expected.also if I sent only the atmega8 to power down,current drawn is again 1.78 mA.Could you please check my code and tell whether i am going about it in the right way?
# include <avr/io.h>
#include <avr/sleep.h>
void SPI_MasterInit(void) //Initialize Atmega8 as master
{
DDRB = (1<<DDB5)|(1<<DDB3)|(1<<DDB2); // Set MOSI,SCK and SS\ output, all others input
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0); // Enable SPI, Master, set clock rate fck/16
}
void SPI_MasterTransmit(char cData) //Transmit data on the SPI interface
{
SPDR = cData; // Start transmission
while(!(SPSR & (1<<SPIF))) // Wait for transmission complete
;
}
void CSn(int i) //Toggle CSn
{
if(i==1)
PORTB|=0x04;
else
PORTB&=0xFB;
}
void Full_RegConfig(void) //for full register configuration of cc1101 using BURST access
{
CSn(0);
while(bit_is_set(PINB,4)){}
SPI_MasterTransmit(0x3E); //address for patable access
SPI_MasterTransmit(0xC0); //patable for PA power control settings,10 dBm o/p power,29.1 ma current consumption
SPI_MasterTransmit(0x40); //burst access and write status registers and command probes
SPI_MasterTransmit(0x29); // register 0x00,GDO2 o/p pin set to default,s7 is CHIP_RDYn
SPI_MasterTransmit(0x2E); // register 0x01,GDO1 o/p pin 3-state default
SPI_MasterTransmit(0x06); // register 0x02,asserts when sync word has been sent / received, and de-asserts at the end of the packet.
SPI_MasterTransmit(0x47); // register 0x03,FIFOTHR:0dB rx attenuation,33 bytes in tx fifo,32 in rx fifo,?TEST1 = 0x35,TEST2 = 0x81 when waking up from SLEEP
SPI_MasterTransmit(0xD3); // register 0x04,SYNC1(high),8 MSB of 16-bit sync word
SPI_MasterTransmit(0x91); // register 0x05,SYNC0(low),8 LSB of 16-bit sync word
SPI_MasterTransmit(0x3D); // register 0x06,Packet length(variable(max)or fixed length):61
SPI_MasterTransmit(0x00); // register 0x07 EARLIER 04,Packet Automation Control1:Preamble Quality estimator threshold=0,auto flush rxfifo when crc not ok,no address
SPI_MasterTransmit(0x01); // register 0x08 EARLIER 05,Packet Automation Control0:Whitening off,normal mode using fifos,crc disabled,infinite packet length mode
SPI_MasterTransmit(0x00); // register 0x09,address used for packet filtration ?
SPI_MasterTransmit(0x00); // register 0x0A,8-bit unsigned channel number
SPI_MasterTransmit(0x06); // register 0x0B,Frequency Synthesizer Control1:152 kHz IF frequency in RX assuming 26 MHz crystal
SPI_MasterTransmit(0x00); // register 0x0C,Frequency Synthesizer Control0:default
SPI_MasterTransmit(0x10); // register 0x0D,Frequency Control Word :417 MHz base frequency for frequency synthesizer
SPI_MasterTransmit(0x09); // register 0x0E EARLIER A7 866,Frequency Control Word
SPI_MasterTransmit(0x7B); // 0x0F EARLIER 62 866,Frequency Control Word
SPI_MasterTransmit(0xF5); // register 0x10 CA,Modem configuration:channel bandwidth of 58kHz
SPI_MasterTransmit(0x75); // register 0x11 EARLIER 83 866,Modem Configuration
SPI_MasterTransmit(0x03); // register 0x12,Modem Configuration:Enable Digital DC blocking filter,2-FSK modulation,disable Manchester encoding/decoding,30/32 sync
SPI_MasterTransmit(0x22); // register 0x13,Disable forward error correction,4 preamble bytes
SPI_MasterTransmit(0xE5); // register 0x14,Modem configuration,192 kHz channel spacing
SPI_MasterTransmit(0x14); // register 0x15 EARLIER 15 866,4.76 kHz frequency deviation
SPI_MasterTransmit(0x07); // register 0x16,Direct RX termination based on RSSI measurement (carrier sense),timeout for sync word search in rx:until end of packet?
SPI_MasterTransmit(0x30); // register 0x17,CCA_MODE,IDLE after packet transmission and after packet reception
SPI_MasterTransmit(0x18); // register 0x18, calibrate when going from IDLE to rx or tx,timeout after xosc start=150 us,enable radio control,xosc on in sleep state ? turn off
SPI_MasterTransmit(0x16); // register 0x19,frequency offset compensation configuration
SPI_MasterTransmit(0x6C); // register 0x1A,bit synchronization configuration
SPI_MasterTransmit(0x03); // register 0x1B,AGC control
SPI_MasterTransmit(0x40); // register 0x1C,AGC control
SPI_MasterTransmit(0x91); // register 0x1D,AGC control
SPI_MasterTransmit(0x87); // register 0x1E,High Byte Event0 Timeout
SPI_MasterTransmit(0x6B); // register 0x1F,Low Byte Event0 Timeout
SPI_MasterTransmit(0xF8); // register 0x20,Wake On Radio Control
SPI_MasterTransmit(0x56); // register 0x21,Front End RX Configuration
SPI_MasterTransmit(0x10); // register 0x22,Front End TX Configuration
SPI_MasterTransmit(0xE9); // register 0x23,Frequency Synthesizer Calibration3:FSCAL(Frequency synthesizer calibration configuration)=3 ?
SPI_MasterTransmit(0x2A); // register 0x24,Frequency Synthesizer Calibration2:high VCO
SPI_MasterTransmit(0x00); // register 0x25,Frequency Synthesizer Calibration1
SPI_MasterTransmit(0x1F); // register 0x26,Frequency Synthesizer Calibration0
SPI_MasterTransmit(0x41); // register 0x27,RC Oscillator Configuration
SPI_MasterTransmit(0x00); // register 0x28,RC Oscillator Configuration
SPI_MasterTransmit(0x59); // register 0x29,Frequency Synthesizer Calibration Control
SPI_MasterTransmit(0x7F); // register 0x2A,Production Test
SPI_MasterTransmit(0x3F); // register 0x2B,AGCTEST – AGC Test
SPI_MasterTransmit(0x81); // register 0x2C,Various Test Settings
SPI_MasterTransmit(0x35); // register 0x2D,Various Test Settings
SPI_MasterTransmit(0x09); // register 0x2E,Various Test Settings:Disable VCO selection calibration
CSn(1);
}
int main()
{
SPI_MasterInit(); //initialize SPI
Full_RegConfig(); //CC1101 configured
CSn(0);
while(bit_is_set(PINB,4)){} //wait for SO to go low
SPI_MasterTransmit(0x36); //SIDLE strobe
SPI_MasterTransmit(0x39); //SPWD strobe
CSn(1);
MCUCR=(1<<SE)|(1<<SM1); //power down mode
sleep_enable();
return 0;
}
