TRF7960 control using Xilinx Spartan FPGA

Shally -

I have worked with two customers who have succesfully used Xilinx FPGA for communication with the TRF family of parts, however, they did not give me their code as they had alot of other proprietary operations for other things going on as well. So i am sorry to say we cannot provide you any direct source code to start out with. I would say that if you follow the notes we have provided you should also be successful here as well - and please let us know if you run into anything that you cannot figure out.

Hi Josh, That is good to know. When you talk about notes, is there an app. note that you are referring to or the datasheet of the chip. Could you point me to the app. note detailing FPGA communication, if it exists. Thanks, Shally

Shally -

the two customers used our standard documentation for parallel and SPI w/SS to implement their solutions (one did their design using parallel mode, the other did it using SPI w/SS) - so then there is not any special documentation needed just for FPGA. Let us know if you cannot find details that you might need to implement this for yourself, as we have tried to make as much information available on the web as we can.

Hi Josh,

A custom controller written in verilog is implemented in the FPGA(master) to handle communication with the TRF7960(slave).  The part is configured to communicate in SPI mode.

1. At power on reset, wait 30ms.
2. Perform SPI write to the Chip Status register (0x00), in addr mode, non-continuous mode, data=0x30.  This turns on the RF output, and sets the RF power to half, MOSI = 0x0030.
3. Wait for IRQ input to go High.
4. Read IRQ Status register (0x0C), in addr mode, read, non-continuous mode, MOSI = 0x4C00.  Store in irqstatus buffer in FPGA.
5. Check for error, if any of the irqstatus[4:1] bits are 1. 
6. If there are no errors, read the FIFO status register (0x1C), MOSI = 0x5C00.  Store data in fifostatus buffer in FPGA.
7. Determine number of bytes to read based on fifostatus[3:0].  NumOfBytes=fifostatus[3:0]+1.
8. Read FIFO I/O register (0x1F), MOSI = 0x5F00.  Store FIFO data in FPGA.  Repeat until NumOfBytes=0.
9. Perform dummy read cycle.  Read from register irq register 0x0C.  MOSI = 0x6C00.
10. Go back to Wait for IRQ state.

When we put a tag on the antenna, we don't see the IRQ go High. What are we missing in our state machine?

Thanks for your help.

Shally

Shally -

Just turning on the transmitter does not constitute performing any operations relating to the transponders except for powering them up. You must send out command that matches what you are setting the ISO control Register to and the tag type you are wanting to interact with.

For example, in the TRF7960A data sheet http://www.ti.com/litv/zip/sloa160 in section 5.12 (starting on page 24)  i cover the interface and then on starting on page 34 (directly after writing the registers and reading them back) i go through the ISO15693 inventory steps for single slot opearation one at a time to give an example here without alot of pages.

Let me know if this gets you started here or not.

Hi Josh,

The new data sheet has far more details than the older datasheet on the TRF7960. Please take a look at the pseudocode we are coding in Verilog and flag off any errors that you see in  it.

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This outlines the interface sequence between the FPGA(master) and TRF7960A(slave) in SPI mode (using SS).

- At power on reset, wait 30ms.
- Following figure 5-20 of the datasheet to send sequence of commands to perform inventory (0x8f, 0x91, 0x3d, 0x00, 0x30, 0x26, 0x01, 0x00).
- Wait for IRQ to go High, read IRQ status register 0x6C and verify it reads 0x80, this indicates TX is complete (from figure 5-21).  Perform dummy read.  Reset fifo.
Question: (are the previous two steps this done only once after power up?)

In Idle state.

if( irq = 1 )
1. Read irq status reg, send command 0x6C, followed by dummy read, this clears the irq register.
2. Read fifo status reg, send command 0x5C.
3. Perform continuous read of fifo, send command 0x7F.
4. Reset fifo, send command 0x8F.  Then read RSSI value, send command 0x4F.
Go back to idle state.

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Thanks a lot for your help.

SHally