TX-FIFO holding different packets

Hello,

WHAT I AM DOING:
I have a question about the packet handling on CC2550.
The transmitter is basicly working fine.

I now wrote a firmware for an uC, to constantly refill the TX-Buffer with data.
I constantly send the same packet which includes the variable length byte.
First byte = 12 , then "Hello world\n" (ASCII-coded).
For data rates up to 300 kBaud (2-FSK) this seems to work fine.

THE PROBLEM:
If I try to increase the data rate I am getting the following problem:
The packets are valid for most part of the time. Yet, occasionally the
GDO-Pin, configured to display the start and end of a packet, shows a
changing packet length. The new packet length corresponds to one of the transmitted
ASCII-characters. It seems like a single byte is missing in the TX-FIFO Buffer.

My SPI-Interface is working at 6 MHz. The timing requirements of the datasheet are fullfilled.
I analysed the traffic with a Logic Analyser and the data being send is correct. The measurements
were made directly at the CC2550-Pins, so errors through capacites along the way can be excluded.

QUESTION:
My firmware is constantly sending new data to the TX-FIFO Buffer, when the treshold condition is met
(without exceeding its capacity). I am NOT waiting for a packet to be completly transmitted. In case of
the described test-packet, there can be data of different packets in the buffer. This case is not explicitly
discussed in the datasheet. Could this be the source of my problem ?


Thanks for any help


Kind regards