Hi all..
in CC253x / 4x Datasheet document, under Power-Management Control sub menu it has given like
The instruction that sets the PCON.IDLE bit must be aligned in a certain way for correct operation. The
first byte of the assembly instruction immediately following this instruction must not be placed on a 4-byte
boundary. Furthermore, cache must not be disabled (see CM in the FCTL register description in
Chapter 6). Failure to comply with this requirement may cause higher current consumption. Provided this
requirement is fulfilled, the first assembly instruction after the instruction that sets the PCON.IDLE bit is
performed before the ISR of the interrupt that caused the system to wake up, but after the system woke
up. If this instruction is a global interrupt disable, it is possible to have it followed by code for execution
after wakeup, but before the ISR is serviced.
I have no idea of what is byte boundary. If anyone can let me know the same then pls help me...
Thanks & Regards
JitheshAR
