Other Parts Discussed in Thread: CC1101
The CC2500 datasheet does not list jitter specifications.
Can you tell me the deviation range?
Conditions
Transmission speed : 250 kbps
Modulation method : MSK
Jitter here is difficult to specify. See here: CC2500: CC2500 Bit Synchronization jitter
Bun
Could you please provide a numerical value for how many microseconds (±μSec) of jitter might be expected under the given conditions?
It does not have to be an exact value—a rough estimate or value under assumed conditions would be very helpful.
To answer this question I'll need a few assumptions cleared up:
1. Are you using sync or async mode?
2. Are you putting the signal on the chip'sI/O pin to be parsed by an MCU?
Bun
1. Are you using sync or async mode?
ANS:We are using asynchronous mode.
2. Are you putting the signal on the chip'sI/O pin to be parsed by an MCU?
ANS:Yes, the signal is being output on the chip’s I/O pin to be parsed by an MCU.
After some digging through old documents, the CC2500 and CC1101 have almost identical architecture and design. The datasheet for CC1101 shine on light on the jitter. See below.
"In asynchronous serial mode no data decision is done on-chip and the raw data is put on the data output line in RX. When using asynchronous serial mode make sure the interfacing MCU does proper oversampling and that it can handle the jitter on the data output line. The MCU should tolerate a jitter of ±1/8 of a bit period as the data stream is timediscrete using 8 samples per bit. In asynchronous serial mode there will be glitches of 37 - 38.5 ns duration (1/XOSC) occurring infrequently and with random periods. A simple RC filter can be added to the data output line between CC1101 and the MCU to get rid of the 37 - 38.5 ns ns glitches if considered a problem. The filter 3 dB cut-off frequency needs to be high enough so that the data is not filtered and at the same time low enough to remove the glitch. As an example, for 2.4 kBaud data rate a 1 kohm resistor and 2.7 nF capacitor can be used. This gives a 3 dB cut-off frequency of 59 kHz."
No, as it explicitly refer to asynchronous mode. In sync serial mode, the radio outputs the clock on a pin, so there is no need for any oversampling on the MCU and it should be safe to simply read the data on the clock edge once.
Bun
Thank you for the information.
However, it was not the response we were hoping for.
We’re looking to understand the jitter of the receiver clock relative to the transmitter clock when configured for synchronous serial mode.
KAWASAKI
I will have to discuss this further with my team and get back to you hopefully by next week. Please do expect some delays as it is a holiday week next week.
Bun