I am trying to port the Simpliciti End Device sample code to work on our custom hardware. Our board was already using the USCI port for something else, so the h/w engineer connected the CC2500 to the USART1 port on our MSP430FG4618.
When executing the MRFI_Init() function the code makes it past the SPI verification check okay (writing 0xA5 to the PKTLEN register and reading it back). However, when it checks the PARTNUM register it reads back 0x45 instead of 0x80.
I put in some test code to write different values to the CC2500's config registers and then read them back, and the values being read back do not match what is being written. The same values are being read back every time I run the code, so it is not just random garbage. It is baffling to me that the initial check would work but then subsequent writes and reads would fail.
Here is how I modified the SPI definitions in mrfi_board_defs.h:
/* ------------------------------------------------------------------------------------------------
* SPI Configuration
* ------------------------------------------------------------------------------------------------
*/
/* CSn Pin Configuration */ // STE -- P4.2
#define __mrfi_SPI_CSN_GPIO_BIT__ 2
#define MRFI_SPI_CONFIG_CSN_PIN_AS_OUTPUT() st( P4DIR |= BV(__mrfi_SPI_CSN_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_CSN_HIGH() st( P4OUT |= BV(__mrfi_SPI_CSN_GPIO_BIT__); ) /* atomic operation */
#define MRFI_SPI_DRIVE_CSN_LOW() st( P4OUT &= ~BV(__mrfi_SPI_CSN_GPIO_BIT__); ) /* atomic operation */
#define MRFI_SPI_CSN_IS_HIGH() ( P4OUT & BV(__mrfi_SPI_CSN_GPIO_BIT__) )
/* SCLK Pin Configuration */ // SCLK -- P4.5
#define __mrfi_SPI_SCLK_GPIO_BIT__ 5
#define MRFI_SPI_CONFIG_SCLK_PIN_AS_OUTPUT() st( P4DIR |= BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SCLK_HIGH() st( P4OUT |= BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SCLK_LOW() st( P4OUT &= ~BV(__mrfi_SPI_SCLK_GPIO_BIT__); )
/* SI Pin Configuration */ // SIMO -- P4.3
#define __mrfi_SPI_SI_GPIO_BIT__ 3
#define MRFI_SPI_CONFIG_SI_PIN_AS_OUTPUT() st( P4DIR |= BV(__mrfi_SPI_SI_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SI_HIGH() st( P4OUT |= BV(__mrfi_SPI_SI_GPIO_BIT__); )
#define MRFI_SPI_DRIVE_SI_LOW() st( P4OUT &= ~BV(__mrfi_SPI_SI_GPIO_BIT__); )
/* SO Pin Configuration */ // SOMI -- P4.4
#define __mrfi_SPI_SO_GPIO_BIT__ 4
#define MRFI_SPI_CONFIG_SO_PIN_AS_INPUT() /* nothing to required */
#define MRFI_SPI_SO_IS_HIGH() ( P4IN & BV(__mrfi_SPI_SO_GPIO_BIT__) )
/* SPI Port Configuration */
#define MRFI_SPI_CONFIG_PORT() st( P4SEL |= BV(__mrfi_SPI_SCLK_GPIO_BIT__) | \
BV(__mrfi_SPI_SI_GPIO_BIT__) | \
BV(__mrfi_SPI_SO_GPIO_BIT__); )
/* read/write macros */
#define MRFI_SPI_WRITE_BYTE(x) st( IFG2 &= ~URXIFG1; U1TXBUF = x; )
#define MRFI_SPI_READ_BYTE() U1RXBUF
#define MRFI_SPI_WAIT_DONE() while(!(IFG2 & URXIFG1));
/* SPI critical section macros */
typedef bspIState_t mrfiSpiIState_t;
#define MRFI_SPI_ENTER_CRITICAL_SECTION(x) BSP_ENTER_CRITICAL_SECTION(x)
#define MRFI_SPI_EXIT_CRITICAL_SECTION(x) BSP_EXIT_CRITICAL_SECTION(x)
/*
* Radio SPI Specifications
* -----------------------------------------------
* Max SPI Clock : 10 MHz
* Data Order : MSB transmitted first
* Clock Polarity : low when idle
* Clock Phase : sample leading edge
*/
/* initialization macro */
#define MRFI_SPI_INIT() \
st ( \
U1CTL = 1; \
U1CTL_bit.MM = 1; \
U1CTL_bit.SYNC = 1; \
U1CTL_bit.CHAR = 1; \
\
U1TCTL = 0; \
U1TCTL_bit.SSEL0 = 0; \
U1TCTL_bit.SSEL1 = 1; \
U1TCTL_bit.CKPH = 1; \
U1TCTL_bit.STC = 1; \
\
U1BR0 = 2; \
U1BR1 = 0; \
U1MCTL = 0; \
\
MRFI_SPI_CONFIG_PORT(); \
ME2_bit.USPIE1 = 1; \
U1CTL_bit.SWRST = 0; \
)
Any ideas what I might be doing wrong?
Thanks,
Dave
