Hi,
Chatto mentioned in http://e2e.ti.com/support/low_power_rf/f/155/p/200493/713334.aspx#713230 that:
Finally, we prefer that the antenna be on the same plane as the balun and RF chip. Also ensuring a solid ground plane under the RF path. Another thing to remember, there should not be any ground plane under the antenna.
I guess the theoretical base for this might be in “3.2 Monopole (λ/4) Antennas” of AN058:
This is very popular due to its size since one antenna element is one λ/4 wavelength and the GND plane acts as the other λ/4 wavelength which produces an effective λ/2 antenna. Therefore, for monopole antenna designs the performance of the antenna is dependent on the ground size, refer to Figure 4.
So GND plane plays a role in determine resonance (correct?) wavelength of the antenna, and hence the performance of the antenna for a particular transceiver. Is this the correct explanation?
An empirical (from our viewpoint) observation which corroborate the explanation is in AN043 Figure 5, in which the connected laptop increases the effective ground plane and degraded the performance. Also is this connection to the theory above correct?
For our practical purpose of adopting the USB dongle (non-nano) circuit we have two questions:
1. Chatto mentioned no ground plane should be under antenna. However, can there be POWER plane and SIGNAL under the antenna? We are going to put the AN043 antenna into a board which already has six layers, and in the area we plan to place the RF and antenna module, there are power plane and signal traces, but fortunately the frequency of signal is under 30MHz, not really a high speed signal.
a) However if we do remove GND planes there, there would be no isolation between the AN043 antenna and low speed signal. The transceiver we use is CC2500, and per its datasheet SWRS040C RX/TX current could reach 20mA. Would 20mA current at 2.4GHz (is it current frequency same as transceiver’s nominal frequency?) causes EM induction that could affect other parts of the circuit?
b) If we keep the GND planes here, the pros is that there could be a good isolation between the RF and antenna with the low speed (<30MHz) signal lines; the cons is that the effective ground area would be increases, which is against the advices by Chatto in http://e2e.ti.com/support/low_power_rf/f/155/p/200493/713334.aspx#713230.
So what is our best choice here?
2. Although Chatto mentioned no ground plane should be under AN043 antenna, in the Gerber file of the USB dongle (non-nano) design we clearly see another AGND plane L2 under layer L1 (top) of the antenna. The AGND plane does NOT lie directly beneath antenna in L1, but directly beneath L1’s associated AGND area on L1. Would this also affect the effective AGND area as seen by the antenna?
3. AN043 “Table 1: Antenna Dimensions” actually gives only dimensions of the antenna, not the ground. So should AGND area on L1 be copied in verbatim from the reference design, and what about the AGND plane asked in question 2)?
4. The readme.txt of the USB dongle (non-nano) design gives dielectric thickness of each layer:
PCB DESCRIPTION:1-2 LAYER PCB 0.25 MM NOMINAL 2-3 LAYER PCB 0.50 MM NOMINAL 3-4 LAYER PCB 0.25 MM NOMINAL THICKNESS FR4 WITH 35um Cu PER LAYER
So the total dielectric thickness below the antenna is 0.25+0.5+0.25=1mm. The antenna sees 1mm dielectric below it, and beyond that it is air again just as above it on L1. In our six layer board, depending on answers to question 1) above, keeping/removing ground planes under the antenna would give different dielectric thickness as seen by the antenna. Would this have a significant impact on its performance? Our ultimate goal is to ensure reliable communication as a NFC device within several meters, yet as shown in AN043 “Table 6: IFA Properties” the antenna has LOS of 240m, far exceeding our expectation. So I guess that even if we have different dielectric thickness under the antenna, or power and signal plane beneath, the influence upon antenna still would not bring its performance down to the extent of failing for NFC tasks?
Matt
