Hi,
I've a good code for the CC1101 that works perfectly :)
This is my main:
#include "include.h"
#define STATE_RX 0
#define STATE_TX 1
extern char paTable[];
extern char paTableLen;
char txBuffer[4];
char rxBuffer[4];
unsigned int i;
char state = STATE_RX;
void main (void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
// 5ms delay to compensate for time to startup between MSP430 and CC1100/2500
__delay_cycles(5000);
TI_CC_SPISetup(); // Initialize SPI port
TI_CC_PowerupResetCCxxxx(); // Reset CCxxxx
writeRFSettings(); // Write RF settings to config reg
TI_CC_SPIWriteBurstReg(TI_CCxxx0_PATABLE, paTable, paTableLen);//Write PATABLE
...
TI_CC_GDO0_PxIES |= TI_CC_GDO0_PIN; // Int on falling edge (end of pkt)
TI_CC_GDO0_PxIFG &= ~TI_CC_GDO0_PIN; // Clear flag
TI_CC_GDO0_PxIE |= TI_CC_GDO0_PIN; // Enable int on end of packet
TI_CC_SPIStrobe(TI_CCxxx0_SRX); // Initialize CCxxxx in RX mode.
// When a pkt is received, it will
// signal on GDO0 and wake CPU
__bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts
}
// GDO0 int
#pragma vector=PORT1_VECTOR
__interrupt void port1_ISR (void)
{
if(state==STATE_RX) {
if(P1IFG & TI_CC_GDO0_PIN)
{
char len=2; // Len of pkt to be RXed (only addr
// plus data; size byte not incl b/c
// stripped away within RX function)
if (RFReceivePacket(rxBuffer,&len)) { // Fetch packet from CCxxxx
P4OUT |= BIT3;
__delay_cycles(100000);
P4OUT &= ~BIT3;
}
}
}
TI_CC_GDO0_PxIFG &= ~TI_CC_GDO0_PIN; // After pkt TX, this flag is set.
state = STATE_RX;
} // Clear it.
// button int
#pragma vector=PORT2_VECTOR
__interrupt void port2_ISR (void)
{
if(TI_CC_SW_PxIFG & (TI_CC_SW1 + TI_CC_SW2))
{
// Build packet
txBuffer[0] = 2; // Packet length
txBuffer[1] = 0x01; // Packet address
txBuffer[2] = 0x69; // Load four switch inputs
state = STATE_TX;
RFSendPacket(txBuffer, 3); // Send value over RF
}
TI_CC_SW_PxIFG &= ~(TI_CC_SW1+TI_CC_SW2); // Clr flag that caused int
}
And these are the RF settings:
#if TI_CC_RF_FREQ == 868 // 868 MHz
// Product = CC1100
// Crystal accuracy = 40 ppm
// X-tal frequency = 26 MHz
// RF output power = 0 dBm
// RX filterbandwidth = 540.000000 kHz
// Deviation = 0.000000
// Return state: Return to RX state upon leaving either TX or RX
// Datarate = 250.000000 kbps
// Modulation = (7) MSK
// Manchester enable = (0) Manchester disabled
// RF Frequency = 868.000000 MHz
// Channel spacing = 199.951172 kHz
// Channel number = 0
// Optimization = Sensitivity
// Sync mode = (3) 30/32 sync word bits detected
// Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX
// CRC operation = (1) CRC calculation in TX and CRC check in RX enabled
// Forward Error Correction = (0) FEC disabled
// Length configuration = (1) Variable length packets, packet length configured by the first received byte after sync word.
// Packetlength = 255
// Preamble count = (2) 4 bytes
// Append status = 1
// Address check = (0) No address check
// FIFO autoflush = 0
// Device address = 0
// GDO0 signal selection = ( 6) Asserts when sync word has been sent / received, and de-asserts at the end of the packet
// GDO2 signal selection = (11) Serial Clock
void writeRFSettings(void)
{
// Write register settings
TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG2, 0x0B); // GDO2 output pin config.
TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG0, 0x06); // GDO0 output pin config.
TI_CC_SPIWriteReg(TI_CCxxx0_PKTLEN, 0xFF); // Packet length.
TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL1, 0x05); // Packet automation control.
TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL0, 0x05); // Packet automation control.
TI_CC_SPIWriteReg(TI_CCxxx0_ADDR, 0x01); // Device address.
TI_CC_SPIWriteReg(TI_CCxxx0_CHANNR, 0x00); // Channel number.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL1, 0x0B); // Freq synthesizer control.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL0, 0x00); // Freq synthesizer control.
TI_CC_SPIWriteReg(TI_CCxxx0_FREQ2, 0x21); // Freq control word, high byte
TI_CC_SPIWriteReg(TI_CCxxx0_FREQ1, 0x62); // Freq control word, mid byte.
TI_CC_SPIWriteReg(TI_CCxxx0_FREQ0, 0x76); // Freq control word, low byte.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG4, 0x2D); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG3, 0x3B); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG2, 0x73); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG1, 0x22); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG0, 0xF8); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_DEVIATN, 0x00); // Modem dev (when FSK mod en)
TI_CC_SPIWriteReg(TI_CCxxx0_MCSM1 , 0x3F); //MainRadio Cntrl State Machine
TI_CC_SPIWriteReg(TI_CCxxx0_MCSM0 , 0x18); //MainRadio Cntrl State Machine
TI_CC_SPIWriteReg(TI_CCxxx0_FOCCFG, 0x1D); // Freq Offset Compens. Config
TI_CC_SPIWriteReg(TI_CCxxx0_BSCFG, 0x1C); // Bit synchronization config.
TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL2, 0xC7); // AGC control.
TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL1, 0x00); // AGC control.
TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL0, 0xB2); // AGC control.
TI_CC_SPIWriteReg(TI_CCxxx0_FREND1, 0xB6); // Front end RX configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_FREND0, 0x10); // Front end RX configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL3, 0xEA); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL2, 0x0A); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL1, 0x00); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL0, 0x11); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_FSTEST, 0x59); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_TEST2, 0x88); // Various test settings.
TI_CC_SPIWriteReg(TI_CCxxx0_TEST1, 0x31); // Various test settings.
TI_CC_SPIWriteReg(TI_CCxxx0_TEST0, 0x0B); // Various test settings.
}
// PATABLE (0 dBm output power)
extern char paTable[] = {0x60};
extern char paTableLen = 1;
#endif
I hope you can see it correctly! :)
This code when flashed in a board sends a frame when a button is pressed. The same code in another board lights a LED to indicate reception :) I have also checked the code by connecting the transmitter's output to an oscilloscope input and I can see the frame shape :)
What I wanted to do is get rid of PREAMBLE and SYNC.
For this, I know I have to modify:
MDMCFG2
MDMCFG1
IOCFG0 (from 06 to 02 because we do not have SYNC anymore!)
I have done this and set a FIFOTHR of half of the packet but the GDO0 interruption does not thrigger anymore :(
In fact, the code gets stuck in one of the two whiles of the code snippet:
void RFSendPacket(char *txBuffer, char size)
{
TI_CC_SPIWriteBurstReg(TI_CCxxx0_TXFIFO, txBuffer, size); // Write TX data
TI_CC_SPIStrobe(TI_CCxxx0_STX); // Change state to TX, initiating
// data transfer
while (!(TI_CC_GDO0_PxIN&TI_CC_GDO0_PIN));
// Wait GDO0 to go hi -> sync TX'ed
while (TI_CC_GDO0_PxIN&TI_CC_GDO0_PIN);
// Wait GDO0 to clear -> end of pkt
TI_CC_GDO0_PxIFG &= ~TI_CC_GDO0_PIN; // After pkt TX, this flag is set.
// Has to be cleared before existing
}
So I see no output on the oscilloscope :(
I know this is a kind of strange thing sending without SYNC and PREAMBLE but I want some low-level control to test several things! :)
Come on, let me know what you think! :)
