CC1101 Automatic Packet Handling

Don Weier

Other Parts Discussed in Thread: CC430F5137, CC1101, TEST2

Hi everyone,

I'm using the CC430F5137 part, but my question deals specifically with the CC1101-based radio module. I've been able to get two parts talking to each other, but there is a catch. I cannot use the automatic sync word detection built in to the radio. The packet format is the following: 5 preamble bytes, three sync words (0xCCCCCC) and the payload. This format was chosen to maintain compatibility with an older product, so it can't be changed.

What I'm seeing is this, by setting the preamble quality threshold to its maximum setting I am able to ignore random noise and using a FIFO threshold interrupt I am able to break in my code and see exactly what the radio received.

The data at this point is the tail end of the preamble bytes, followed by the sync words, followed by the data payload. Discounting the fact that they are shifted, the data is uncorrupted. When I use the same code and settings with the addition of the automatic sync word detection, I am no longer able to receive any data at all.

I know the radio is able to receive the data, and am unable to determine why this fails once I try to use automatic sync word detection. Does anyone have an idea? I can post my register settings if you think it will help.

Thanks for any and all help,

Don

over 11 years ago

0 Sverre over 11 years ago

TI__Mastermind 39860 points

Are you using variable packet length? If yes, then the received packet length will be the first byte after the detected sync word (I assume received length will be 0xCC). If received packet length byte > PKTLEN register in receiver the packet will be discarded. Note also that you get an RXFIFO_OVERFLOW unless you read out data out of the 64 byte RX FIFO if the length byte > 64 bytes.

0 Don Weier over 11 years ago in reply to Sverre

Intellectual 520 points

Sverre,

Thanks for the response. I'm actually using a fixed packet length, initialized to its maximum value so that it won't overflow, the first few bytes of all the packets included in our protocol have a length packet in them in a fixed position, however it is not located such that I can use variable packet length handling on the CC1101. What I have been doing is setting the packetlength high so that I can interrupt on the minimum FIFO threshold (4 bytes), read in the length byte, and adjust the PKTLEN register on the fly. This is based on a TI document (I believe the CC1101 datasheet mentions it).

Don

0 Martin B over 11 years ago in reply to Don Weier

TI__Genius 12735 points

Hi Don

If you post your radio specific register settings it would be of help.

To check if this is related to the sync word, I would set up a test link with standard variable packet length, and radio parameters given by SmartRF Studi, but with the 5 bytes of preamble + the 0xCCCCCC sync word.

0 Don Weier over 11 years ago in reply to Martin B

Intellectual 520 points

        #define SMARTRF_SETTING_FSCTRL1    0x06
       #define SMARTRF_SETTING_FSCTRL0    0x00

       #define SMARTRF_SETTING_FREQ2       0x10//433.5MHz
       #define SMARTRF_SETTING_FREQ1      0xAB
       #define SMARTRF_SETTING_FREQ0      0xA9

       #define SMARTRF_SETTING_SYNC1       0xCC
       #define SMARTRF_SETTING_SYNC0       0xCC

       #define SMARTRF_SETTING_MDMCFG4       0x79//BW = ~203 k
       #define SMARTRF_SETTING_MDMCFG3       0x84//19.24 kBaud
       #define SMARTRF_SETTING_MDMCFG2    0x01//2-FSK, 15/16 sync word bit detection
       #define SMARTRF_SETTING_MDMCFG1    0x22//minimum 4 bytes preamble during transmit (32 bits)
       #define SMARTRF_SETTING_MDMCFG0    0x78//channel spacing ~ 4000Hz

       #define SMARTRF_SETTING_DEVIATN    0x56//~88.9 kHz deviation
       #define SMARTRF_SETTING_BSCFG      0x6C//0x6D//data rate +/- 3.125% accepted for rx

       #define SMARTRF_SETTING_PKTCTRL1   0xE0   //PQT = 7, look for 32 consecutive sync bytes before a sync word is accepted
       #define SMARTRF_SETTING_PKTCTRL0   0x00

       #define SMARTRF_SETTING_MCSM0      0x19
       #define SMARTRF_SETTING_MCSM1      0x30 //go to idle after an RX, will immediately turn RX back on in code, triggering autocal
       #define SMARTRF_SETTING_MCSM2      0x07

       #define SMARTRF_SETTING_FOCCFG     0x36
       #define SMARTRF_SETTING_CHANNR     0x00

       #define SMARTRF_SETTING_FREND1     0x56
       #define SMARTRF_SETTING_FREND0     0x10

       #define SMARTRF_SETTING_WOREVT1    0x87 // not used
       #define SMARTRF_SETTING_WOREVT0    0x6B // not used
       #define SMARTRF_SETTING_WORCTL     0xF8 /* Note: WOR not supported on CC430 */ // not used

       #define SMARTRF_SETTING_AGCCTRL2   0x03//0x43
       #define SMARTRF_SETTING_AGCCTRL1   0x40
       #define SMARTRF_SETTING_AGCCTRL0   0x91

       #define SMARTRF_SETTING_FSCAL3     0xE9
       #define SMARTRF_SETTING_FSCAL2     0x2A
       #define SMARTRF_SETTING_FSCAL1     0x00
       #define SMARTRF_SETTING_FSCAL0     0x1F
       #define SMARTRF_SETTING_FSTEST     0x59

       #define SMARTRF_SETTING_TEST2      0x81
       #define SMARTRF_SETTING_TEST1      0x35
       #define SMARTRF_SETTING_TEST0      0x09

       #define SMARTRF_SETTING_PTEST      0x7F // not used
       #define SMARTRF_SETTING_AGCTEST    0x88 // not used

       #define SMARTRF_SETTING_FIFOTHR       0x00//RX overflow interrupt at 4*(n+1) where n = lower nibble of this register, TX = 64-RX thr

       #define SMARTRF_SETTING_IOCFG2     0x29
       #define SMARTRF_SETTING_IOCFG1     0x1E
       #define SMARTRF_SETTING_IOCFG0     0x1B

       #define SMARTRF_SETTING_PKTLEN     0xFF //max value so that the FIFO overflow interrupt will be triggered first

       #define SMARTRF_SETTING_ADDR       0xCC

here are my settings, if I write 0x00 for MDMCFG2, and lower the RX FIFO threshold, I get to see valid data. I will run the test you described and let everyone know the results. Thank you for the help!

Don

0 Martin B over 11 years ago in reply to Don Weier

TI__Genius 12735 points

Hi Don

Please try the register settings attached. I've set it up with your RF parameters and sync word. Only difference is the frequency as I only had 868/900 EM's at hand. With these settings I have no problem transmitting and receiving.

Fullscreen 2604.cc430_19.2kbps_2FSK_RX.xml Download

<?xml version="1.0" encoding="ISO-8859-1"?>
<!DOCTYPE configuration SYSTEM "C:/Program Files (x86)/Texas Instruments/SmartRF Tools/SmartRF Studio 7/config/xml/configdata.dtd"[]>
<dcpanelconfiguration>
    <Devicename>CC430F6137</Devicename>
    <Description>Saved configuration data</Description>
    <registersettings>
        <Register>
            <Name>AGCCTRL2</Name>
            <Value>0x43</Value>
        </Register>
        <Register>
            <Name>DEVIATN</Name>
            <Value>0x56</Value>
        </Register>
        <Register>
            <Name>FIFOTHR</Name>
            <Value>0x47</Value>
        </Register>
        <Register>
            <Name>FOCCFG</Name>
            <Value>0x16</Value>
        </Register>
        <Register>
            <Name>FREQ0</Name>
            <Value>0x76</Value>
        </Register>
        <Register>
            <Name>FREQ1</Name>
            <Value>0x62</Value>
        </Register>
        <Register>
            <Name>FREQ2</Name>
            <Value>0x21</Value>
        </Register>
        <Register>
            <Name>FSCAL0</Name>
            <Value>0x1f</Value>
        </Register>
        <Register>
            <Name>FSCAL1</Name>
            <Value>0x00</Value>
        </Register>
        <Register>
            <Name>FSCAL2</Name>
            <Value>0x2a</Value>
        </Register>
        <Register>
            <Name>FSCAL3</Name>
            <Value>0xe9</Value>
        </Register>
        <Register>
            <Name>FSCTRL1</Name>
            <Value>0x06</Value>
        </Register>
        <Register>
            <Name>IOCFG0</Name>
            <Value>0x06</Value>
        </Register>
        <Register>
            <Name>LQI</Name>
            <Value>0x7f</Value>
        </Register>
        <Register>
            <Name>MCSM0</Name>
            <Value>0x10</Value>
        </Register>
        <Register>
            <Name>MDMCFG2</Name>
            <Value>0x03</Value>
        </Register>
        <Register>
            <Name>MDMCFG3</Name>
            <Value>0x84</Value>
        </Register>
        <Register>
            <Name>MDMCFG4</Name>
            <Value>0x79</Value>
        </Register>
        <Register>
            <Name>PA_TABLE0</Name>
            <Value>0x8d</Value>
        </Register>
        <Register>
            <Name>PKTCTRL0</Name>
            <Value>0x05</Value>
        </Register>
        <Register>
            <Name>RSSI</Name>
            <Value>0x80</Value>
        </Register>
        <Register>
            <Name>SYNC0</Name>
            <Value>0xcc</Value>
        </Register>
        <Register>
            <Name>SYNC1</Name>
            <Value>0xcc</Value>
        </Register>
        <Register>
            <Name>TEST0</Name>
            <Value>0x09</Value>
        </Register>
        <Register>
            <Name>TEST1</Name>
            <Value>0x35</Value>
        </Register>
        <Register>
            <Name>TEST2</Name>
            <Value>0x81</Value>
        </Register>
        <Register>
            <Name>VCO_VC_DAC</Name>
            <Value>0x94</Value>
        </Register>
        <Register>
            <Name>WORCTRL</Name>
            <Value>0xfb</Value>
        </Register>
        <Register>
            <Name>WOREVT0</Name>
            <Value>0x6b</Value>
        </Register>
        <Register>
            <Name>WOREVT1</Name>
            <Value>0x87</Value>
        </Register>
    </registersettings>
    <dcpanel>
        <Property role="44" name="m_chkRegView">2</Property>
        <Property role="44" name="m_chkRfParameters">2</Property>
        <Property role="37" name="m_tabUserMode">1</Property>
        <Property role="33" name="m_easyModeSettings">-1</Property>
        <Property role="33" name="m_typicalSettings">-1</Property>
        <Property role="37" name="m_testFuncPanel">3</Property>
    </dcpanel>
    <rfparameters>
        <Property role="46" name="Xtal frequency">26.000000</Property>
    </rfparameters>
    <conttx>
        <Property role="45" name="m_rbtModulated">1</Property>
        <Property role="45" name="m_rbtUnmodulated">0</Property>
        <Property role="46" name="m_cmbDataFormat">-1</Property>
        <Property role="44" name="m_chkFreqSweep">0</Property>
        <Property role="44" name="m_chkChanSweep">0</Property>
    </conttx>
    <contrx>
        <Property role="46" name="m_cmbDataFormat">-1</Property>
        <Property role="44" name="m_chkAutoScroll">2</Property>
    </contrx>
    <packettx>
        <Property role="42" name="m_edtPayloadSize">30</Property>
        <Property role="42" name="m_edtPacketCount">100</Property>
        <Property role="42" name="m_edtPacketCountEsy">100</Property>
        <Property role="42" name="m_edtRandomPacketData">29 23 be 84 e1 6c d6 ae 52 90 49 f1 f1 bb e9 eb b3 a6 db 3c 87 0c 3e 99 24 5e 0d 1c </Property>
        <Property role="42" name="m_edtPacketData"></Property>
        <Property role="42" name="m_edtAccessAddress"></Property>
        <Property role="44" name="m_chkAddSeqNbr">2</Property>
        <Property role="44" name="m_chkInfinite">0</Property>
        <Property role="44" name="m_chkInfiniteEsy">0</Property>
        <Property role="45" name="m_rbtRandom">1</Property>
        <Property role="45" name="m_rbtText">0</Property>
        <Property role="45" name="m_rbtHex">0</Property>
        <Property role="44" name="m_chkAdvanced">0</Property>
    </packettx>
    <packetrx>
        <Property role="42" name="m_edtPacketCount">100</Property>
        <Property role="42" name="m_edtPacketCountEsy">100</Property>
        <Property role="42" name="m_edtAccessAddress"></Property>
        <Property role="44" name="m_chkInfinite">0</Property>
        <Property role="44" name="m_chkInfiniteEsy">0</Property>
        <Property role="46" name="m_cmbViewFormat">0</Property>
        <Property role="44" name="m_chkSeqNbrIncluded">2</Property>
        <Property role="42" name="m_edtDumpFile"></Property>
        <Property role="44" name="m_chkAdvanced">0</Property>
        <Property role="44" name="m_chk802154gMode">0</Property>
    </packetrx>
    <commandpanel>
        <Property role="44" name="m_chkInsertLength">0</Property>
        <Property role="42" name="m_edtTxFifo"></Property>
        <Property role="42" name="m_edtRxFifo"></Property>
        <Property role="46" name="m_cmbInstrInput">-1</Property>
    </commandpanel>
</dcpanelconfiguration>

0 Don Weier over 11 years ago in reply to Martin B

Intellectual 520 points

Hi Martin, thanks for the help you've been giving me. I've tried your settings at my frequency and have not had any luck. I'm going to keep working on this updating as I make progress. I've tested the 0xCCCC sync word using another project that utilizes a fixed length packet format and was able to communicate without trouble, taking those settings and adjusting them to fit this project has, again, broken communication. When looking at the RFIFG register in CCS's register browser, I am able to see that the CC430 sees the PQT being met, but RFIFG 9 (positive edge) remains low. This further indicates to me that the sync word is being missed. I'm very confused, but I will keep working at this.

Thanks,

Don

0 Martin B over 11 years ago in reply to Don Weier

TI__Genius 12735 points

I'm also surprised that you did not get the settings I sent you to work. Did you copy the settings into your own code without any doing any other register changes. The register settings you posted did not work for me, so you need the change all registers to the ones I sent you.

Are you testing on a TI evaluation board or on own PCB? Are you able to test the chip in SmartRF Studio?

0 Don Weier over 11 years ago in reply to Martin B

Intellectual 520 points

Martin,

I used your settings with only one modification, I used 0x40 instead of 0x47 for the FIFO_THR register. This is to allow me to interrupt when four bytes are received. I do also have other registers in addition to the settings you sent me intitialized to certain values, I will try removing those next.

Don

0 Don Weier over 11 years ago in reply to Martin B

Intellectual 520 points

I've gotten it working! Here are the settings I ended up using:

       #define SMARTRF_SETTING_FSCTRL1    0x0F
       #define SMARTRF_SETTING_FSCTRL0    0x00
       #define SMARTRF_SETTING_FREQ2      0x10 // 433.5 MHz
       #define SMARTRF_SETTING_FREQ1      0xAB
       #define SMARTRF_SETTING_FREQ0      0xA9

       #define SMARTRF_SETTING_DEVIATN    0x56

       #define SMARTRF_SETTING_MDMCFG4       0x79
       #define SMARTRF_SETTING_MDMCFG3       0x84
       #define SMARTRF_SETTING_MDMCFG2    0x02
       #define SMARTRF_SETTING_MDMCFG1    0x22
       #define SMARTRF_SETTING_MDMCFG0    0x78
       #define SMARTRF_SETTING_CHANNR     0x00

       #define SMARTRF_SETTING_FREND1     0x56
       #define SMARTRF_SETTING_FREND0     0x10

       #define SMARTRF_SETTING_MCSM0      0x18
       #define SMARTRF_SETTING_MCSM1      0x30
       #define SMARTRF_SETTING_MCSM2      0x07

       #define SMARTRF_SETTING_WOREVT1    0x87 // not used
       #define SMARTRF_SETTING_WOREVT0    0x6B // not used
       #define SMARTRF_SETTING_WORCTL     0xF8 /* Note: WOR not supported on CC430 */ // not used

       #define SMARTRF_SETTING_FOCCFG     0x16
       #define SMARTRF_SETTING_BSCFG      0x6C

       #define SMARTRF_SETTING_AGCCTRL2   0x03
       #define SMARTRF_SETTING_AGCCTRL1   0x40
       #define SMARTRF_SETTING_AGCCTRL0   0x91

       #define SMARTRF_SETTING_FSCAL3     0xE9
       #define SMARTRF_SETTING_FSCAL2     0x2A
       #define SMARTRF_SETTING_FSCAL1     0x00
       #define SMARTRF_SETTING_FSCAL0     0x1F
       #define SMARTRF_SETTING_FSTEST     0x59

       #define SMARTRF_SETTING_TEST2      0x88//0x81
       #define SMARTRF_SETTING_TEST1      0x31//0x35
       #define SMARTRF_SETTING_TEST0      0x09

       #define SMARTRF_SETTING_PTEST      0x7F // not used
       #define SMARTRF_SETTING_AGCTEST    0x3F//0x88 // not used

       #define SMARTRF_SETTING_FIFOTHR    0x40

       #define SMARTRF_SETTING_IOCFG2     0x29
       #define SMARTRF_SETTING_IOCFG1     0x2E//0x1E
       #define SMARTRF_SETTING_IOCFG0     0x06//0x1B

       #define SMARTRF_SETTING_PKTCTRL1   0x04//append status set, RSSI will be appended to data payload
       #define SMARTRF_SETTING_PKTCTRL0   0x00

       #define SMARTRF_SETTING_ADDR       0x00
       #define SMARTRF_SETTING_PKTLEN     0xFF // packet length was 0x10

       #define SMARTRF_SETTING_SYNC1       0xCC
       #define SMARTRF_SETTING_SYNC0       0xCC

Thanks for the help,

Don

0 Martin B over 11 years ago in reply to Don Weier

TI__Genius 12735 points

That's good news. Good luck continuing forward

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CC1101 Automatic Packet Handling