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TRF7960 write single block

Other Parts Discussed in Thread: TRF7960A, TRF7960

Hello,
I'm using the TRF7960A for reading and writing TI tags.
Reading the Inventory and/or reading all the blocks doesn't make any problem.
But I'm not able to write to any block of the tag using the "Write single block" command.
My register settings of the TRF7960 is as follows:
Register 00H: value 29H
01H: 06H
02H: 00H
03H: 00H
04H: c2H
05H: 00H
06H: 00H
07H: 0eH
08H: 1fH
09H: 30H
0aH: 40H
0bH: 02H

As mentioned above the "Inventory" command works fine using the following pseudo-code:
1. SSN Start condition
2. Transferring the following byte stream:
      buf[0] = 8fH (Reset Fifo)
      buf[1] = 91H (Send with CRC)
      buf[2] = 3dH (Write Continous from register 1dH)
      buf[3] = 00H (length part 1)
      buf[4] = 30H (length part 2, 3 Bytes)
      buf[5] = 27H (Request flags: double subcarrier, high data rate, inventory flag, 1 slot)
      buf[6] = 01H (Inventory command)
      buf[7] = 00H (Mask)
3. SSN Stop condition

Also the "Read Multiple Blocks" command works fine:
1. SSN Start condition
2. Transferring the following byte stream:
      buf[0] = 8fH (Reset Fifo)
      buf[1] = 91H (Send with CRC)
      buf[2] = 3dH (Write Continous from register 1dH)
      buf[3] = 00H (length part 1)
      buf[4] = 40H (length part 2, 4 Bytes)
      buf[5] = 03H (Request flags: double subcarrier, high data rate)
      buf[6] = 23H (Read Multiple Blocks command)
      buf[7] = 00H (First block to read)
      buf[8] = 3fH (Amount of blocks)
3. SSN Stop condition

BUT the "Write Single Block" command doesn't work. The content of the block on the
tag never changes. Here is the preudo-code I use to write to a block:
1. SSN Start condition
2. Transferring the following byte stream:
      buf[0] = 8fH (Reset Fifo)
      buf[1] = 91H (Send with CRC)
      buf[2] = 3dH (Write Continous from register 1dH)
      buf[3] = 00H (length part 1)
      buf[4] = 70H (length part 2, 7 Bytes)
      buf[5] = 43H (Request flags: double subcarrier, high data rate, option flag)
      buf[6] = 21H (Write Single Block command)
      buf[7] = 00H (Block number)
      buf[8] = 04H (Data)
      buf[9] = 03H (Data)
      buf[10] = 02H (Data)
      buf[11] = 01H (Data)
3. SSN Stop condition
4. The IRQ TxReady occurs, I Reset the Fifo again (send 8fH), wait 13ms, then I
 send 94H (EOF).

What am I doing wrong?        

Thanks a lot for anybody's help.

  • Hello Joachim,

    The command you described seems to be formatted correctly and timing seems fine as well.

    After looking at your register settings, there is one issue there:

    In Register 0x09 you have the lowest 2 bits set to be 00b. This makes the chip transmit at ASK 10% modulation, which is too low for the TI tags. I recommend setting the lowest 2 bits to be 01b in order to set the modulation to OOK 100%, but anything above 20% modulation would be acceptable to communicate with the TI tags.

    If that fix does not solve your problem here are some follow-up questions I have:

    1) What reply (if any) are you receiving from the tag?

    2) Which TI tag are you using for these tests (I'm guessing it is a Plus tag if the Read Multiple blocks is working)?

    3) Can you provide screenshots of the SPI communication from a logic analyzer?

  • Hello Ralph,

    thanks a lot for your reply and sorry for my late answer, but I was out for the last few days.

    Here the answers to your questions:

    1) I only get a reply in the TxReady-IRQ after the command "Read Fifo Status Register" (6cH).

        Here the reply is a0H and the dummy byte 3eH.

        No other reply occurs.

    2) Yes, it is a Plus tag

    3) Here are some screenshots:

    D0 = SSN

    D1 = MOSI

    D2 = MISO

    D3 = SPI_CLK

    3.1) Entire byte stream: 8fH, 91H, 3dH, 00H, 70H, 43H, 21H, 01H, b3H, b3H, b3H, b3H

    3.1.1) 8fH

    3.1.2) 91H

    3.1.3) 3dH

    3.1.4) 00H

    3.1.5) 70H

    3.1.6) 43H

    3.1.7) 21H

    3.1.8) 01H

    3.1.9) b3H (Data)

    3.1.10) b3H (Data)

    3.1.11) b3H (Data)

    3.1.12) b3H (Data)

    3.2) Entire TxReady-IRQ: 6cH (out), a0H (in), 3eH (in), 8f (out)

    3.2.1) 6cH

    3.2.2) a0H

    3.2.3) 3eH (Dummy byte)

    3.2.4) 8fH (Reset Fifo)

    3.3) After 15ms: 8fH (Reset Fifo)

    3.4) After 15ms: 94H (EOF)

    That's it.

    Can anybody find something wrong?

    Thanks again for helping me.

    Joachim

  • Hello,

    sorry, all the screenshots have been deleted. I try to post every screenshot separately.

    3.1) Entire byte stream: 8fH, 91H, 3dH, 00H, 70H, 43H, 21H, 01H, b3H, b3H, b3H:

  • Hello,

    next try:

    3.1) Entire byte stream: 8fH, 91H, 3dH, 00H, 70H, 43H, 21H, 01H, b3H, b3H, b3H, b3H

    3.1.1) 8fH (Reset Fifo)

    3.1.2) 91H

    3.1.3) 3dH

    3.1.4 00H

    3.1.5) 70H

    3.1.6) 43H

    3.1.7) 21H

    3.1.8) 01H

    3.1.9) b3H (Data)

    3.1.10) b3H (Data)

    3.1.11) b3H (Data)

    3.1.12) b3H (Data)

     

    3.2) Entire TxReady-IRQ: 6cH (out), a0H (in), 3eH (in), 8f (out)

    3.2.1) 6cH

    3.2.2) a0H

    3.2.3) 3eH (Dummy byte)

    3.2.4) 8fH (Reset Fifo)

    3.3) After 15ms: 8fH (Reset Fifo)

    3.4) After 15ms: 94H (EOF)

  • Hello,
    I'm sorry. It's not possible to post screenshots.
    Joachim
  • Hi Joachim,

    Sorry that you are having trouble with the screenshots. But I do have enough information to help you further based on what you have stated in your posts.

    The issue you are having is that when you receive an 0xA0 in the IRQ Status register, that means that it still has bytes in the FIFO that need to be sent out. When you reset the FIFO with a 0x8F after getting the 0xA0, you end up clearing those bytes and then transmit and incomplete frame and therefore the tag doesn't receive the command correctly.

    To fix this, you should modify your code flow so that when receiving a 0xA0 as an IRQ Status, you go back to waiting for a TX Complete. After the remaining bytes are sent, then the IRQ Status will become an 0x80, trigger the IRQ interrupt, and you can then read the 0x80 and reset the FIFO as usual and continue with your code flow.

    Here is an LSA capture of a Write Single Block using the TRF7960 so you can see what you mean: Dropbox Link for LSA Capture

    To view the attached capture, you will need to download the Saleae Logic software from https://www.saleae.com/downloads

  • Hello Ralph, hello Josh,

    Thanks again for helping me. Writing is fine now.

    Best regards
    Joachim