TRF7970A: TRF7970A reading 0 bytes from FIFO

Hello Kuna,

Have you tried reading a TRF79xx register to verify SPI is working correctly?

What is the exact startup sequence you are using?

Have you placed a logic state analyzer or oscilloscope on the SPI lines to observe the traffic and verify bytes are sent/received as expected?

We cannot support a Webex, debugging will be done through E2E.

Hello Kuna,

Still awaiting answers on my prior questions.

Hi Ralph Jacobi,

Thanks for your immediate response. Please find answers below:

Have you tried reading a TRF79xx register to verify SPI is working correctly?

I am able to read and write TRF79xx registers correctly. I am confirming this by reading the registers after software reset for default values and also after setting the registers as per the TRF7970 data sheet (6.11 TRF7970A Initialization and example code for MSP430)

What is the exact startup sequence you are using?

6.11 TRF7970A Initialization

To properly initialize the TRF7970A, perform these steps:

1. Raise the EN, EN2, and SS lines at the correct intervals after power up (for timing diagrams, see

Figure 6-3 and Figure 6-4).

    usleep(2000);

    GPIO_write(CC2640R2_LAUNCHXL_GPIO_SPI_CS, 0);

    usleep(3000);

    GPIO_write(CC2640R2_LAUNCHXL_GPIO_E2_ENABLE, 1);   //EN2

    usleep(1000);

    GPIO_write(CC2640R2_LAUNCHXL_GPIO_LCD_ENABLE, 1);   //EN1

 

2. Issue a Software Initialization direct command (0x03), followed by an Idle direct command (0x00) to

soft reset the TRF7970A.

NOTE

Table 6-21 lists the initial register settings for the TRF7970A after the Software Initialization

command.

3. Delay 1 ms to allow the TRF7970A to fully process the soft reset.

 

        SPI_directCommand(TRF79X0_SOFT_INIT_CMD);

        SPI_directCommand(TRF79X0_IDLE_CMD);

 

        usleep(1000);

4. Issue a Reset FIFO direct command (0x0F).

 

SPI_directCommand(TRF79X0_RESET_FIFO_CMD);

 

5. Write the Modulator and SYS_CLK Control register (0x09) with the appropriate application-specific

setting for the crystal and system clock settings.

               SPI_writeSingle(0x01, TRF79X0_MODULATOR_CONTROL_REG); // SYS_CLK disable, ASK 100%

 6. (Optional) Write the Regulator and I/O Control register (0x0B) with the appropriate application-specific

setting.

 

        SPI_writeSingle(0x06, TRF79X0_REGULATOR_CONTROL_REG);

 

        usleep(200);//  Delay

 

                                     VDD_RF = 3.3 V, VDD_A and VDD_X = 3.3 V

 7. Write the NFC Target Detection Level register (0x18) with the value of 0x00. For details on this

requirement, see the TRF7970A Silicon Errata.

 

 

ISO 15693  Initialization

 SPI_writeSingle(0x02, TRF79X0_ISO_CONTROL_REG);

 SPI_writeSingle(0x20, TRF79X0_CHIP_STATUS_CTRL_REG);

 SPI_writeSingle(0x00, TRF79X0_NFC_TARGET_LEVEL_REG);

 

Have you placed a logic state analyzer or oscilloscope on the SPI lines to observe the traffic and verify bytes are sent/received as expected?

Yes. I am able to use the analyzer and observed the bytes sent/received on the MOSI and MISO lines. I have modified code and to keep CS line low during continuous write(this is not captured in  above image).

It will be great if you provide example code to read TRF7970A FIFO data from CC2640R2 Micro usin SPI with chip select.

Thanks,

Narsimhulu Kuna

Hello Kuna,

We will not provide an example for the CC2640R2, the examples we offer are the extent of what we will provide.

It looks like the startup sequence is handled correctly and basic SPI is solid, so next questions are:

1) Are you using an RTOS? If so, how are you prioritizing the NFC tasks? Does IRQ have priority?

2) You mention inconsistent IRQ's, can you elaborate further? Are you getting false IRQs? Or do you feel they are delayed? How long do you have to wait til you get an IRQ? And what IRQ Status results are you getting? Do you at least get a 0x80 for TX Complete?

3) You mention FIFO status is always zero, have you ever gotten an indication that an RX operation began? That would be flags like IRQ status = 0x40 or 0x60.

Hi Ralph Jacobi,

Thank you for your quick response.

1) Are you using an RTOS? If so, how are you prioritizing the NFC tasks? Does IRQ have priority?
Yes, we are using TI-RTOS. we have created one task only.
we have not given any priority to IRQ(callback function)

2) You mention inconsistent IRQ's, can you elaborate further? Are you getting false IRQs? Or do you feel they are delayed? How long do you have to wait til you get an IRQ? And what IRQ Status results are you getting? Do you at least get a 0x80 for TX Complete?
we are getting IRQ status as 0x80 very few times (2 out of 10).

3) You mention FIFO status is always zero, have you ever gotten an indication that an RX operation began? That would be flags like IRQ status = 0x40 or 0x60.

FIFO status is always zero. we never read IRQ status as 0x40 or 0x60

Thank you,
Narsimhulu Kuna.

Hello Kuna,

Inconsistent TX Complete IRQ's tell me that something is off regarding the timings. To further debug the issue, I would need to get a complete SPI capture with timings between each command to review. This can be done with a Logic State Analyzer such as what is provided by Saleae.

Ralph Jacobi,

I will share SPI capture (Logic State Analyzer) soon with you. Please find the output captured by SPI Analyzer with this reply. One more behavior, we have observed

SPI Single read is not working after sending Inventory command but it was fine before sending Inventory command.

Thanks,

Kuna

1) There seems to be a fairly large delay between sending 0x83 and then 0x80, that is not correct for soft reset, you need to send these commands sequentially and then delay after the 0x80.

Kuna:

There is no delay between sending 0x83 and 0x80. There is 2 msec delay after 0x80 and before fifo reset command.

2) Try using Regulator Control setting of 0x00 rather than 0x06 for starters, sometimes depending on VIN to the device, higher regulator control settings can't get supplied the desired voltage and that impacts performance (for example at 0x6, you want VIN = 3.3V and VIN = 3V would cause issues).

3) It looks like you are writing Register 0x0D with 0x25? If so, do not do that. First off, you would only write it with 0x3F if you are doing anti-collision, but your command is for single slot inventory so you should leave it as the default 0x3E.

Kuna: We have tried setting as suggested in 2 and 3. Still we are not getting any IRQ or data in IRQ status register.

Noticed one more thing I almost missed, you are resetting the FIFO before you read the IRQ status, that is not good either, make sure you are waiting for an IRQ, then read the IRQ status before you reset the FIFO. Based on that setup I am not surprised you don't get TX Complete interrupts.

Kuna: We keep waiting for IRQ for 10 msec, still no interrupt. Kept reading IRQ status register for every 1 msec, still no data.

Thank you very much for the response. We tried different comments suggested in the forum like min 10 msec delay before sending inventory command etc...

Please suggest how to narrow down the problem. We are at critical stage now. Your help really appreciated.

Kuna

t

RFID SPI DATA2.zip

Hello Kuna,

Maybe I don't understand how to read your SPI data from that analyzer but the timestamps to me pretty clear indicates there is 5 ms from when 0x83 is sent to when 0x80 is sent:

# Level	Index	m:s.ms.us	Dur	Len	Err	Record	Data
0	0	0:00.000.000				Capture started	[12/18/18 21:18:55]
0	1	0:03.368.231	5.226.500 ms	1 B		Transaction	8300
1	2	0:03.368.231	5.226.500 ms	1 B		MOSI	83
1	3	0:03.368.231	5.226.500 ms	1 B		MISO	0
0	4	0:03.373.529	34.300 us	1 B		Transaction	8000
1	5	0:03.373.529	34.300 us	1 B		MOSI	80
1	6	0:03.373.529	34.300 us	1 B		MISO	0
0	7	0:03.374.702	34.300 us	1 B		Transaction	8F00
1	8	0:03.374.702	34.300 us	1 B		MOSI	8F
1	9	0:03.374.702	34.300 us	1 B		MISO	0

Hi Ralph Jacobi,

Thank you for your reply. We will sort out delay issue.
will the 5 ms delay between 0x80 and 0x83 impact on Tag reader functionality?. we are able to initialize and configure TRF7970A properly with the delay. We read register configurations using SPI single read function. It looks like everything is fine before sending inventory command. We are not able to read register configurations after sending inventory command and not getting IRQ. Please let us know if you need any additional details.

Thanks.

Hello Kuna,

Yes it can because the device is not being properly initialized per our DS specs. Reading the registers doesn't mean that tag reading functionality is online, it only means SPI communication is correct.