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CC2530 Timer 2 Capture Function

JC de Dios
Prodigy 230 points

Other Parts Discussed in Thread: CC2530

Hello,

I have been experimenting on the captured timer value when the SFD goes high. Based on my experiments on CC2530 running at 32MHz, and also considering the clock imprecisions (clock drift), I could see that there is around 3-4 microseconds difference (96-128 clock ticks) between the time stamps on the transmitter and the receiver SFD capture value. I think this is not the propagation delay because the CC2530 modules are just beside each other, and the RF delay within 1 meter is within 3 nanoseconds. Does someone knows the reason on these delays? Thank you very much. 

  • 0
    TI__Intellectual 1005 points

    This delay comes from internal delays in the TX and RX chains in the cc2530. There is a small delay in the TX chain, I would guess < 0.5µs. And around 3µs delay in the receiver chain (analog modules + digital filtering + data recovery).

    Some jitter is also expected as there is a lot of different clock domains involved and the syncronization between these causes some jitter in the timing.

  • 0 in reply to MaMoe
    Prodigy 230 points

    Thank you Moe. I thought the SFD time capture between the transmitter and the receiver side happens precisely at the same time (with only propagation delay as error) because time capture will happen as the SFD byte was transmitted and received from the antenna. I also thought that doing this in the lower layers of the network will reduce the jitter in timing. I am trying to synchronize the Timer 2 values of the CC2530, already finished correcting the clock offset and drifts and saw this delay. Is it safe to assume that this 3-4 microsecond delay is constant, irregardless of distance? What are the other factors that will not make this delay constant? Are these timing jitters documented on the Users Guide or datasheet? Thank you very much for the help

  • 0 in reply to JC de Dios
    Prodigy 230 points

    Follow up question: In Section 23.8.2 of the CC2530 User's Guide (TX State Timing), what is the meaning of the first bullet point "The SFD signal, which is stretched by 2 ms"? Is this included in the 3-4 microseconds delay? Thank you

  • 0 in reply to JC de Dios
    TI__Intellectual 1005 points

     

    On the transmitter side I think the timing of the SFD signal relative to when the signal is actually transmitted is pretty constant. Only variation is the fact that the analog delays will vary somewhat with temperature, voltage and process variations. However the analog delay in the TX chain is relatively small, I would estimate it to be < 0.5 µs.

    On the receiver side the delay is larger, it takes some time for the devices to verify that it is a valid SFD that it has received, so most of the delay origins here. Approx 3 µs. Also here the delay will scale with temperature/voltage/process.

    For a single device under stable operating conditions, there will still be some jitter. This is due to clock domain crossings in the receiver. We have not evaluated worst case or rms jitter, but an educated guess will be in the hundreds of nano seconds rage.

    The propagation delay will come on top of this.

     

     

  • 0 in reply to JC de Dios
    TI__Intellectual 1005 points

    JC de Dios said:

    Follow up question: In Section 23.8.2 of the CC2530 User's Guide (TX State Timing), what is the meaning of the first bullet point "The SFD signal, which is stretched by 2 ms"? Is this included in the 3-4 microseconds delay? Thank you

     

    This comment is related to the falling edge of the SFD signal only. The SFD signal stays high 2 microseconds after the last chip of the last symbol has been transmitted