Other Parts Discussed in Thread: CC1310
Hi team,
Here's an issue from the customer may need your help:
When SPI MODE is set to SPI_POL1_PHA0, the CS signal is pulled high for a period of time after each byte. When CPHA is set to 1, CS can be pulled down directly throughout the process.
With CPHA = 0, is there a way to keep CS low throughout the process?
Could you help check this case? Thanks.
Best Regards,
Cherry