CC1120: Packet reception not set in the RX FIFO(314MHz, 2-GFSK, 100kbps)

O.H

Part Number: CC1120
Other Parts Discussed in Thread: CC1200, CC1312R, WMBUS, MSP430G2744

Hi experts,

My customer is using a CC1120 and it is not set in the RX FIFO even though it appears to be data received.
Could you please check if there is any setting error?

Regarding the register settings, They are referring to the SmartRF Studio values.
Attached is a screenshot of the configuration screen, an xml file, and an Excel file of the "register setting values".

[Environment]

[How to reproduce]
Set the register value in "Register setting value" and shift to Receive mode.
Calibration is performed manually.
Receive a 6-byte packet while polling the status register.
The status register changes as if a packet was received, but NUM_RXBYTES does not change from 0.

[Result]
Before packet reception

Register	Value	Overview
MARCSTATE	0x6D	MARC_STATE=RX
PQT_SYNC_ERR	0x1F, 0x2F, 0x3F
RX_STATUS (MODEM_STATUS1)	0x11, 0x13	RX FIFO EMPTY
LQI_VAL	0x00
MARC_STATUS1	0x00
MARC_STATUS0	0x00
DEM_STATUS	0x00
NUM_RXBYTES	0x00

After packet reception

Register	Value	Overview
MARCSTATE	0x41	MARC_STATE=IDLE
PQT_SYNC_ERR	0x00
RX_STATUS (MODEM_STATUS1)	0x91	SYNC_FOUND, RX FIFO EMPTY
LQI_VAL	0x81～0x84	PKT_CRC_OK=CRC check ok
MARC_STATUS1	0x00
MARC_STATUS0	0x00
DEM_STATUS	0x00
NUM_RXBYTES	0x00	(Received data is not set in the FIFO)

Also, it would be helpful if you could share any check points or reference information to solve the problem.

Best regards,
O.H

Fullscreen CC1120_314MHz_2gfsk_100kbaud_20221229.xml Download

<?xml version="1.0" encoding="ISO-8859-1"?>
<!DOCTYPE configuration SYSTEM "C:/Program Files (x86)/Texas Instruments/SmartRF Tools/SmartRF Studio 7/config/xml/configdata.dtd"[]>
<dcpanelconfiguration>
    <Devicename>CC1120</Devicename>
    <Description>Saved configuration data</Description>
    <registersettings>
        <Register>
            <Name>AGC_CFG0</Name>
            <Value>0xc0</Value>
        </Register>
        <Register>
            <Name>AGC_CFG1</Name>
            <Value>0xa9</Value>
        </Register>
        <Register>
            <Name>AGC_CS_THR</Name>
            <Value>0xef</Value>
        </Register>
        <Register>
            <Name>AGC_REF</Name>
            <Value>0x3c</Value>
        </Register>
        <Register>
            <Name>CHAN_BW</Name>
            <Value>0x01</Value>
        </Register>
        <Register>
            <Name>DCFILT_CFG</Name>
            <Value>0x15</Value>
        </Register>
        <Register>
            <Name>DEVIATION_M</Name>
            <Value>0x53</Value>
        </Register>
        <Register>
            <Name>FIFO_CFG</Name>
            <Value>0x00</Value>
        </Register>
        <Register>
            <Name>FREQ1</Name>
            <Value>0xc0</Value>
        </Register>
        <Register>
            <Name>FREQ2</Name>
            <Value>0x75</Value>
        </Register>
        <Register>
            <Name>FREQ_IF_CFG</Name>
            <Value>0x3a</Value>
        </Register>
        <Register>
            <Name>FS_CAL0</Name>
            <Value>0x0e</Value>
        </Register>
        <Register>
            <Name>FS_CAL1</Name>
            <Value>0x40</Value>
        </Register>
        <Register>
            <Name>FS_CFG</Name>
            <Value>0x16</Value>
        </Register>
        <Register>
            <Name>FS_DIG0</Name>
            <Value>0x5f</Value>
        </Register>
        <Register>
            <Name>FS_DIG1</Name>
            <Value>0x00</Value>
        </Register>
        <Register>
            <Name>FS_DIVTWO</Name>
            <Value>0x03</Value>
        </Register>
        <Register>
            <Name>FS_DSM0</Name>
            <Value>0x33</Value>
        </Register>
        <Register>
            <Name>FS_DVC0</Name>
            <Value>0x17</Value>
        </Register>
        <Register>
            <Name>FS_PFD</Name>
            <Value>0x50</Value>
        </Register>
        <Register>
            <Name>FS_PRE</Name>
            <Value>0x6e</Value>
        </Register>
        <Register>
            <Name>FS_REG_DIV_CML</Name>
            <Value>0x14</Value>
        </Register>
        <Register>
            <Name>FS_SPARE</Name>
            <Value>0xac</Value>
        </Register>
        <Register>
            <Name>FS_VCO0</Name>
            <Value>0xb4</Value>
        </Register>
        <Register>
            <Name>IF_MIX_CFG</Name>
            <Value>0x00</Value>
        </Register>
        <Register>
            <Name>IOCFG0</Name>
            <Value>0x40</Value>
        </Register>
        <Register>
            <Name>IOCFG1</Name>
            <Value>0xb0</Value>
        </Register>
        <Register>
            <Name>IOCFG2</Name>
            <Value>0x06</Value>
        </Register>
        <Register>
            <Name>IOCFG3</Name>
            <Value>0xb0</Value>
        </Register>
        <Register>
            <Name>IQIC</Name>
            <Value>0x00</Value>
        </Register>
        <Register>
            <Name>MDMCFG0</Name>
            <Value>0x05</Value>
        </Register>
        <Register>
            <Name>MODCFG_DEV_E</Name>
            <Value>0x0f</Value>
        </Register>
        <Register>
            <Name>PA_CFG0</Name>
            <Value>0x7a</Value>
        </Register>
        <Register>
            <Name>PA_CFG2</Name>
            <Value>0x5d</Value>
        </Register>
        <Register>
            <Name>PKT_CFG0</Name>
            <Value>0x20</Value>
        </Register>
        <Register>
            <Name>PKT_LEN</Name>
            <Value>0xff</Value>
        </Register>
        <Register>
            <Name>PREAMBLE_CFG1</Name>
            <Value>0x18</Value>
        </Register>
        <Register>
            <Name>SYMBOL_RATE0</Name>
            <Value>0x9a</Value>
        </Register>
        <Register>
            <Name>SYMBOL_RATE1</Name>
            <Value>0x99</Value>
        </Register>
        <Register>
            <Name>SYMBOL_RATE2</Name>
            <Value>0xa9</Value>
        </Register>
        <Register>
            <Name>SYNC_CFG1</Name>
            <Value>0x08</Value>
        </Register>
        <Register>
            <Name>TOC_CFG</Name>
            <Value>0x0a</Value>
        </Register>
        <Register>
            <Name>XOSC1</Name>
            <Value>0x03</Value>
        </Register>
        <Register>
            <Name>XOSC5</Name>
            <Value>0x0e</Value>
        </Register>
    </registersettings>
    <dcpanel>
        <Property name="m_chkRegView" role="44">2</Property>
        <Property name="m_chkCmdView" role="44">0</Property>
        <Property name="m_chkRfParameters" role="44">2</Property>
        <Property name="m_cmbUserMode" role="46">1</Property>
        <Property name="m_easyModeSettings" role="33">-1</Property>
        <Property name="m_typicalSettings" role="33">-1</Property>
        <Property name="m_testFuncPanel" role="37">2</Property>
    </dcpanel>
    <rfparameters>
        <Property name="m_cmbFrontends" role="46">0</Property>
        <Property name="m_chkHGMorBYP" role="44">2</Property>
        <Property name="m_cmbEmRevs" role="46">-1</Property>
        <Property name="Xtal Frequency" role="46">32.000000</Property>
    </rfparameters>
    <conttx>
        <Property name="m_rbtModulated" role="45">1</Property>
        <Property name="m_rbtUnmodulated" role="45">0</Property>
        <Property name="m_cmbDataFormat" role="46">-1</Property>
        <Property name="m_chkFreqSweep" role="44">0</Property>
        <Property name="m_chkChanSweep" role="44">0</Property>
    </conttx>
    <contrx>
        <Property name="m_cmbDataFormat" role="46">-1</Property>
        <Property name="m_chkAutoScroll" role="44">2</Property>
    </contrx>
    <packettx>
        <Property name="m_edtPayloadSize" role="42">30</Property>
        <Property name="m_edtPacketCount" role="42">100</Property>
        <Property name="m_edtPacketCountEsy" role="42">100</Property>
        <Property name="m_edtRandomPacketData" role="42">13 0d 89 0a 1c db ae 32 20 9a 50 ee 40 78 36 fd 12 49 32 f6 9e 7d 49 dc ad 4f 14 f2 </Property>
        <Property name="m_edtPacketData" role="42"></Property>
        <Property name="m_edtAccessAddress" role="42"></Property>
        <Property name="m_edtDeviceAddress" role="42"></Property>
        <Property name="m_chkAddSeqNbr" role="44">2</Property>
        <Property name="m_chkInfinite" role="44">0</Property>
        <Property name="m_chkInfiniteEsy" role="44">0</Property>
        <Property name="m_rbtRandom" role="45">1</Property>
        <Property name="m_rbtText" role="45">0</Property>
        <Property name="m_rbtHex" role="45">0</Property>
        <Property name="m_chkAdvanced" role="44">0</Property>
    </packettx>
    <packetrx>
        <Property name="m_edtPacketCount" role="42">100</Property>
        <Property name="m_edtPacketCountEsy" role="42">100</Property>
        <Property name="m_edtAccessAddress" role="42"></Property>
        <Property name="m_chkInfinite" role="44">0</Property>
        <Property name="m_chkInfiniteEsy" role="44">0</Property>
        <Property name="m_cmbViewFormat" role="46">0</Property>
        <Property name="m_chkSeqNbrIncluded" role="44">2</Property>
        <Property name="m_edtDumpFile" role="42"></Property>
        <Property name="m_chkAdvanced" role="44">0</Property>
        <Property name="m_chk802154gMode" role="44">0</Property>
    </packetrx>
    <commandpanel>
        <Property name="m_chkInsertLength" role="44">0</Property>
        <Property name="m_edtTxFifo" role="42"></Property>
        <Property name="m_edtRxFifo" role="42"></Property>
        <Property name="m_cmbInstrInput" role="46">-1</Property>
    </commandpanel>
    <packetRxSniffMode>
        <Property name="m_edtPreambleLength" role="42">24</Property>
        <Property name="m_edtCarrierSenseThreshold" role="42">-90</Property>
        <Property name="m_rbtRssi" role="45">1</Property>
        <Property name="m_rbtPreamble" role="45">0</Property>
    </packetRxSniffMode>
</dcpanelconfiguration>

CC1120_314MHz_2gfsk_100kbaud_20230126.xlsx

over 2 years ago

0 Siri over 2 years ago

TI__Guru* 86131 points

I do not have any HW for the frequency band you are suing, so I tested this at 868 MHz.

Settings, as exported by SmartRF Studio below:

// Address Config = No address check 
// Bit Rate = 100 
// Carrier Frequency = 868.000000 
// Deviation = 82.763672 
// Device Address = 0 
// Manchester Enable = false 
// Modulation Format = 2-GFSK 
// PA Ramping = true 
// Packet Bit Length = 0 
// Packet Length = 255 
// Packet Length Mode = Variable 
// Performance Mode = High Performance 
// RX Filter BW = 200.000000 
// Symbol rate = 100 
// TX Power = 15 
// Whitening = false 

static const registerSetting_t preferredSettings[]= 
{
  {CC1120_IOCFG3,             0xB0},
  {CC1120_IOCFG2,             0x06},
  {CC1120_IOCFG1,             0xB0},
  {CC1120_IOCFG0,             0x40},
  {CC1120_SYNC_CFG1,          0x07},
  {CC1120_DEVIATION_M,        0x53},
  {CC1120_MODCFG_DEV_E,       0x0F},
  {CC1120_DCFILT_CFG,         0x04},
  {CC1120_PREAMBLE_CFG1,      0x18},
  {CC1120_FREQ_IF_CFG,        0x00},
  {CC1120_IQIC,               0x00},
  {CC1120_CHAN_BW,            0x01},
  {CC1120_MDMCFG0,            0x05},
  {CC1120_SYMBOL_RATE2,       0xA9},
  {CC1120_SYMBOL_RATE1,       0x99},
  {CC1120_SYMBOL_RATE0,       0x99},
  {CC1120_AGC_REF,            0x3C},
  {CC1120_AGC_CS_THR,         0xEC},
  {CC1120_AGC_CFG3,           0x83},
  {CC1120_AGC_CFG2,           0x60},
  {CC1120_AGC_CFG1,           0xA9},
  {CC1120_AGC_CFG0,           0xC0},
  {CC1120_FIFO_CFG,           0x78},
  {CC1120_SETTLING_CFG,       0x03},
  {CC1120_FS_CFG,             0x12},
  {CC1120_PKT_CFG0,           0x20},
  {CC1120_PA_CFG0,            0x01},
  {CC1120_PKT_LEN,            0xFF},
  {CC1120_IF_MIX_CFG,         0x00},
  {CC1120_TOC_CFG,            0x0A},
  {CC1120_FREQ2,              0x6C},
  {CC1120_FREQ1,              0x80},
  {CC1120_FS_DIG1,            0x00},
  {CC1120_FS_DIG0,            0x5F},
  {CC1120_FS_CAL1,            0x40},
  {CC1120_FS_CAL0,            0x0E},
  {CC1120_FS_CHP,             0x27},
  {CC1120_FS_DIVTWO,          0x03},
  {CC1120_FS_DSM0,            0x33},
  {CC1120_FS_DVC0,            0x17},
  {CC1120_FS_PFD,             0x50},
  {CC1120_FS_PRE,             0x6E},
  {CC1120_FS_REG_DIV_CML,     0x14},
  {CC1120_FS_SPARE,           0xAC},
  {CC1120_FS_VCO4,            0x11},
  {CC1120_FS_VCO2,            0x4B},
  {CC1120_FS_VCO1,            0x9C},
  {CC1120_FS_VCO0,            0xB4},
  {CC1120_XOSC5,              0x0E},
  {CC1120_XOSC1,              0x03},
  {CC1120_DCFILTOFFSET_I1,    0x24},
  {CC1120_DCFILTOFFSET_I0,    0x68},
  {CC1120_DCFILTOFFSET_Q1,    0x09},
  {CC1120_DCFILTOFFSET_Q0,    0x31},
  {CC1120_RSSI1,              0x2C},
  {CC1120_RSSI0,              0x27},
  {CC1120_LQI_VAL,            0x8D},
  {CC1120_PQT_SYNC_ERR,       0x10},
  {CC1120_FREQOFF_EST1,       0xFF},
  {CC1120_FREQOFF_EST0,       0x2C},
  {CC1120_AGC_GAIN3,          0x15},
  {CC1120_AGC_GAIN2,          0x9E},
  {CC1120_AGC_GAIN1,          0x0C},
  {CC1120_MAGN1,              0x02},
  {CC1120_MAGN0,              0xEC},
  {CC1120_ANG1,               0x01},
  {CC1120_ANG0,               0xE9},
  {CC1120_CHFILT_I2,          0x0F},
  {CC1120_CHFILT_I1,          0xFD},
  {CC1120_CHFILT_I0,          0x0C},
  {CC1120_CHFILT_Q0,          0x8C},
  {CC1120_PARTNUMBER,         0x48},
  {CC1120_PARTVERSION,        0x21},
  {CC1120_MODEM_STATUS1,      0x91},
  {CC1120_MARC_STATUS1,       0x80},
  {CC1120_RXFIRST,            0x07},
  {CC1120_RXLAST,             0x07},
};

After sending a 6 bytes long packet, the receiver goes from RX state to IDLE state.

The status registers are as follow:

MODEM_STATUS1: 0x81 (SYNC_FOUND = 1, PQT_VALID = 1)

LQI_VAL: 0x8D (PKT_CRC_OK = 1)

NUM_RXBYTES: 0x08 (6 data bytes including the length, and two status bytes)

After I read out the FIFO, the values are these:

MODEM_STATUS1: 0x91 (SYNC_FOUND = 1, RXFIFO_EMPTY = 1, PQT_VALID = 1)

LQI_VAL: 0x8D (PKT_CRC_OK = 1)

NUM_RXBYTES: 0x00 (FIFO is empty)

As you can see, I am not able to reproduce what you are seeing.

Please provide code/pseudocode for your receive routine, together with logic analyzer plot of you SPI polling during/after packet reception

Siri

0 TheGhostOf over 2 years ago in reply to Siri

Mastermind 6470 points

A couple of questions:

- Why do you use CC1120 for 100 kbps? CC1200 would be a better choice if you want a transceiver

- From the excel file it looks like you are using the default IF frequency, is that the case?

0 O.H over 2 years ago in reply to Siri

Mastermind 6340 points

Hi Siri,

Thank you for your reply.

Siri said:
Please provide code/pseudocode for your receive routine, together with logic analyzer plot of you SPI polling during/after packet reception

I attached. This is the SPI polling, no interrupts are used, and the status register is being retrieved to determine the status.

Apologies. They do not have a logic analyzer and cannot provide one.

Fullscreen receive_routine.c Download

uint8	readBytes[128];

void receive_pkt(void)
{
	static volatile uint8 _marcstate[12];
	uint8 marcstate;
	uint8 numRxBytes;
	static volatile uint8 rc;
	
	cc112xSpiReadReg(CC112X_MARCSTATE, &marcstate, 1);
	_marcstate[0] = marcstate;

	cc112xSpiReadReg(CC112X_PQT_SYNC_ERR, &marcstate, 1);
	_marcstate[1] = marcstate;
	cc112xSpiReadReg(CC112X_RX_STATUS, &marcstate, 1);
	_marcstate[2] = marcstate;
	cc112xSpiReadReg(CC112X_TX_STATUS, &marcstate, 1);
	_marcstate[3] = marcstate;
	cc112xSpiReadReg(CC112X_MARC_STATUS1, &marcstate, 1);
	_marcstate[4] = marcstate;
	cc112xSpiReadReg(CC112X_MARC_STATUS0, &marcstate, 1);
	_marcstate[5] = marcstate;
	cc112xSpiReadReg(CC112X_DEM_STATUS, &marcstate, 1);
	_marcstate[6] = marcstate;
	cc112xSpiReadReg(CC112X_RXFIRST, &marcstate, 1);
	_marcstate[7] = marcstate;
	cc112xSpiReadReg(CC112X_RXLAST, &marcstate, 1);
	_marcstate[8] = marcstate;
	cc112xSpiReadReg(CC112X_LQI_VAL, &marcstate, 1);
	_marcstate[9] = marcstate;
	cc112xSpiReadReg(CC112X_RSSI1, &marcstate, 1);
	_marcstate[10] = marcstate;
	cc112xSpiReadReg(CC112X_RSSI0, &marcstate, 1);
	_marcstate[11] = marcstate;
	
//	cc112xSpiReadReg(CC112X_IOCFG3, readBytes, 0x2f);
//	cc112xSpiReadReg(CC112X_IF_MIX_CFG, readBytes, 0x41);
	
	rc = cc112xSpiReadReg(CC112X_NUM_RXBYTES, &numRxBytes, 1);
	if (numRxBytes > 0)
	{
		// FIFO read
		cc112xSpiReadRxFifo(readBytes, numRxBytes);

		// receive process...

	}
}

Best regards,
O.H

0 O.H over 2 years ago in reply to TheGhostOf

Mastermind 6340 points

Hi TheGhostOf,

Thank you for your reply. Please see below for the customer's response.

TheGhostOf said:
- Why do you use CC1120 for 100 kbps? CC1200 would be a better choice if you want a transceiver

This is because we have a transmitter that transmits with this specification and the only receiver we had on hand that could receive was the CC1120.
Incidentally, the CC1312R is able to receive packets from this transmitter, although it does not support it.
Is it difficult to receive 100 kbps with CC1120?

TheGhostOf said:
- From the excel file it looks like you are using the default IF frequency, is that the case?

We have not changed from the data output by SmartRF Studio. Should we change it?

Best regards,
O.H

0 TheGhostOf over 2 years ago in reply to O.H

Mastermind 6470 points

100 kbps, 2 GFSK is not a default setting in SmartRF Studio. You have to use zero IF for this datarate on CC1120 and zero IF does not give optimal performance. TI developed some 100 kbps settings at one point (WMBUS C- mode, someone at TI can help you find them)

As said, CC1200 will do a better job since it doesn't need zero IF for this datarate.

O.H said:
Incidentally, the CC1312R is able to receive packets from this transmitter, although it does not support it.

Not sure what you mean here?

A simple logic analyzer is relatively cheap and more so if you account for the hours saved by having one.

0 Siri over 2 years ago in reply to O.H

TI__Guru* 86131 points

I am afraid I do not understand your receive routine.

where in your code are you calling receive_pkt() and how many times is it called?

If you are calling it in the middle of the packets, when for example only 1 byte is received, you read that one byte from the FIFO, and then what?

If you need to use SPI polling instead of interrupt, you should poll marcstate until the radio is done in RX state, and then reaf out the complete packet afer RX is done.

This will work as long as your packet length does not exceeds the FIFO size.

Siri

0 O.H over 2 years ago in reply to TheGhostOf

Mastermind 6340 points

Hi TheGhostOf,

Thank you for your reply.

TheGhostOf said:
O.H said:
Incidentally, the CC1312R is able to receive packets from this transmitter, although it does not support it.

Not sure what you mean here?

Our apologies. Our mistake.

Is it correct to say that customers can fully evaluate and use 314MHz with CC1312R on their own if they want to use it?
Because 314MHz is supported, but we do not have test data.

If we use 314MHz, is CC1312R recommended over CC1200?

Best regards,
O.H

0 O.H over 2 years ago in reply to Siri

Mastermind 6340 points

Hi Siri,

Thank you for your reply.

We share the information we receive with our customers. We will contact you again as soon as we receive a response.

Best regards,
O.H

0 O.H over 2 years ago in reply to Siri

Mastermind 6340 points

Hello Sira,

Please see below for the customer's response.

Siri said:
where in your code are you calling receive_pkt() and how many times is it called?

If you are calling it in the middle of the packets, when for example only 1 byte is received, you read that one byte from the FIFO, and then what?

receive_pkt() is called in the main process in a for loop.

To check for complete packets, we plan to implement a process that connects and analyzes the data read from the FIFO.

Best regards,
O.H

0 O.H over 2 years ago in reply to TheGhostOf

Mastermind 6340 points

Hello TheGhostOf,

Please see below for the customer's response.

TheGhostOf said:
100 kbps, 2 GFSK is not a default setting in SmartRF Studio. You have to use zero IF for this datarate on CC1120 and zero IF does not give optimal performance. TI developed some 100 kbps settings at one point (WMBUS C- mode, someone at TI can help you find them)

As said, CC1200 will do a better job since it doesn't need zero IF for this datarate.

If using a zero IF on the CC1120 would set it in the RX FIFO, I'd like to give it a try.
Could you please tell me the value of the register setting?

We will consider CC1200 for commercialization, but could you give us your view on CC1312R?

O.H said:
Is it correct to say that customers can fully evaluate and use 314MHz with CC1312R on their own if they want to use it?
Because 314MHz is supported, but we do not have test data.

If we use 314MHz, is CC1312R recommended over CC1200?

Best regards,
O.H

0 Siri over 2 years ago in reply to O.H

TI__Guru* 86131 points

Why do you want to read part of the packet during receive? This just complicates your implementation.

If I shall spend more time on this, you need to provide me with a complete code example that triggers the conditions that you are seeing, so that I can run it on our kit and see what is going on.

Siri

0 O.H over 2 years ago in reply to Siri

Mastermind 6340 points

Hi Siri,

Thank you for your support, and sorry for late reply.

Siri said:
If I shall spend more time on this, you need to provide me with a complete code example that triggers the conditions that you are seeing, so that I can run it on our kit and see what is going on.

We will share the codes we have received from our customers.
The microcontroller is MSP430G2744 and the integrated development environment is IAR's IDE.
If any information is missing, please let us know.

cc1120_not_set_in_the_rxfifo.zip

Best regards,
O.H

+1 Siri over 2 years ago in reply to O.H

TI__Guru* 86131 points

I took the code and implemented the receive_pkt function in my project.

I monitored everything with a logic analyzer while receiving a packet.

Did no read the RX_STATUS and TX_STATUs registers as they are not defined for CC1120 (did realize after I tested that this is the modem_status registers:

As you can see, the packet is received and all registers are updated accrdingly.

If you have problems getting this to work, I strongly recommend that you buy a cheap logic analyzer so that you are able to debug what is going on.

I cannot see any thing that is not as it should be, and cannot spend more time on this.

Siri

0 TheGhostOf over 2 years ago in reply to Siri

Mastermind 6470 points

O.H. : Have you tested your code with known HW and with settings from SmartRF Studio?

0 O.H over 2 years ago in reply to Siri

Mastermind 6340 points

Hi SIri,

Thank you for your kind support.

The customer is now oriented to check again, including the hardware.

If additional questions arise, we would appreciate it if you could discuss them in a new thread.

Best regards,
O.H

Sub-1 GHz

Sub-1 GHz forum

CC1120: Packet reception not set in the RX FIFO(314MHz, 2-GFSK, 100kbps)