CC1310: Hardware and software iIC communication issues

Hi Alex,

1. INV means that the GPIO will have inverted logic. 1 will disable the GPIO, and 0 will enable it.
   This is useful if you want to have 2 external pins connected to one internal pin, if you want to drive a radio switch with a special truth table for instance.
   
2. In GPIO_SetConfig(), use GPIO_CFG_OUT_OD_NOPULL  
3. Could you share that components datasheet? It seems strange.
   We do not have a way to change the start timing of the I2C peripheral, it is set automatically according to the bus frequency.
4. Are you talking about the Watchdog peripheral? It is disabled by default.
5. We do not have a simulator to provide, and I do not know of any that support that family of devices.

I'm sorry I've entered one letter less 

The CC1310 software simulates the IIC communication 

TI has any routines or code ideas for reference

Alex Zhang said:

5.

The CC1310 software simulates the IC
TI has any routines or code ideas for reference

Hi Alex,

I understand now, you can have a look at our i2ctmp example, located in the SDK: https://dev.ti.com/tirex/explore/node?node=A__AGrHyrNCuqlDNr6-Qm-yMg__com.ti.SIMPLELINK_CC13X0_SDK__eCfARaV__LATEST

Regards,

Arthur

Alex Zhang said:

There is an iIC device that supports 400 KHz communication speed. There is a requirement for timing that the start bit SDA of the transmission is 5US before SCL is pulled low as the CC1310 is only 1.5US, is there any way to let the iIC of CC1310 transmit data by pulling sda low by 3.5us before sending the start bit normally? 

Yes, the technical details are that the chip engineers concerned have been asked to wake up and ensure that sda is pulled low early to guarantee operation at 400 KHz 

M117 MTS01 I2C协议FAQ-敏源202107.pdfM117.pdf

Hi Alex,

Thank you for the data, it is very helpful.

Is your customer sending the dummy sequence that is mentionned in that document?

Also, did they get to test with the actual chip?

Regards,

Arthur

There is a requirement for timing that the start bit SDA of the transmission is 5us earlier than SCL is pulled low. You can wake up normally 

Hello, is there an update to this question? Thanks 

Hi Alex,

I do not think I can provide an update, unless you have more questions.

The conclusion was that we can not change the timing of the I2C clocks, unless you are willing to implement I2C in software.

Regards,

Arthur

Arthur R☑️ said:

unless you are willing to implement I2C in software.

How this is done, is there any routine to refer to 

Hi Alex,

I do not have any examples to provide, but many people have done implementation on Internet: https://github.com/bitbank2/BitBang_I2C

Regards,

Arthur