Other Parts Discussed in Thread: CC1352P7
Tool/software:
Dear TI-Team!
In the datasheet of the CC1352P7-1 I read that there exist three CPUs:
1. Cortex-M4F for application and upper layer stack
2. Cortex-M0 for lower layer stack (physical layer)
3. Sensor controller
So I understood it like this, that the Cortex-M0 takes the responsibilities of a PHY (modulation and demodulation). I tried the example code for WI-SUN with border-router and coap-node. In the code I can see that WISU_NCP_ENABLE is not defined for the ns_coap_node-code but is defined for the ns_br-code. Does this mean for the node that the Cortex-M0 is not used in this example? How is the physical layer then realized and what are the advantages and disadvantages of using NCP or not and why the different configuration for the border-router and the coap-node? Could you give me some overview here?
Thanks a lot!
Anna