wireless transmission with the ez430 ek

There's an update which might be usefull to understand what is going on.

When the microcontroller writes in strobe mode the TXFIFO, before transmission, the CC2500 always answers with 0x0F after each write (It is in IDLE state, while the FIFOBUFFER is empty). I was expecting to see the FIFO_BYTES_AVAILABLE field changing after each write, but it doesn't. However, after the whole write burst, if I check the status of the TXFIFO, by reading from register TXBYTES, it give me back the exact number of data I wrote in.

If I check the status of the CC2500, immediately after a STX strobe command, it aswers back with 0x10 (so, it is in tx mode, but the FIFO_BYTES_AVAILABLE is zero). Finally, when I check the TXFIFO status (by reading the TXBYTES register), the CC2500 aswers back with: 0x10 (during address transmission) and with 0x0A as number of data in the TX FIFO.

Is there something strange in this? I can't actually understand whether the TXFIFO must be emptyed while trasmitting data or not.

Again, thanks in advance for any suggestion that will come

Gian Nicola

Hi Gian,

When I 1st used the General Radio I set up a piece of code that would monitor the state machine.   I could set break points at each state and be able to watch the Radio go through each of its states.

I have included that project.  Keep in mind, though, that pinging the SPI port repeatedly will drop your sensitivity.  But, for troubleshooting, or understanding the radio, this is a good piece of code.

I don't know if you are actaully reading the FIFO level, or using the Status Byte to monitor the TX_FIFO bytes

Using the status byte Tx_FIFO Bytes is reported back each time you do a write to the SPI port (as opposed to the RX_FIFO Bytes when you do a read on the SPI port).  A SNOP command can be used to monitor the Status byte.

Try the code out and see if you see similar results.

Here is the lab guide to show how to set up the project.

Hi protagonist. Let me try to better explain the issues i have with the code.

I can estabilish a comunication though the SPI interface (i'm using the USCIB0 module) between the microcontroller and the CC2500, and i can actually check the SPI lines with a digital oscilloscope, which triggers changes on the CSn channel. So, each time a communication is estabilished i can see exchanged data.

If i perform a burst write on the TXFIFO, the following happens:

the first byte I send is the header containing the address (0x3F (TXFIFO address)) while following bytes are data I want to write in the TxFIFO. Each tiem a byte is sent through the SPI, the CC2500 answers with a status byte, containing its status and a 4-bit field which is called in CC2500 datasheet FIFO_BYTES_AVAILABLE. My first question is: what this field stands for? Is it supposed to be automatically updated each time a write is performed? I'm just asking you this because in my case it doesn't change.

However, as i wrote in my previous post, I guess that data are correctly written in the txFIFO because if I perform a check (by reading the TXBYTES register) everything is as expected. This stated, I try to transmit the content of the txFIFO over the radio by changing the status to TX (The txFIFO was filled with the CHIP in IDLE state). However nothing happens on the GDO0 pin state (IOCFG0==0x06), so I don't know whether data have been sent or not.

The following are definitions for GDO0 pin;

#define TI_CC_GDO0_PxOUT        P2OUT
#define TI_CC_GDO0_PxIN         P2IN
#define TI_CC_GDO0_PxDIR        P2DIR
#define TI_CC_GDO0_PxSEL        P2SEL

#define TI_CC_GDO0_PxIE         P2IE
#define TI_CC_GDO0_PxIES        P2IES
#define TI_CC_GDO0_PxIFG        P2IFG
#define TI_CC_GDO0_PIN          0x40    // GDO0 == P2.6

while these are initalizations performed at the start of the main, just after the CC2500 is powered up and initialized

TI_CC_GDO0_PxDIR &= ~TI_CC_GDO0_PIN;      // forces GDO0 to be an input
TI_CC_GDO0_PxSEL &= ~TI_CC_GDO0_PIN;      // forces GDO0 to be used as GPIO
 
TI_CC_GDO0_PxIES |= TI_CC_GDO0_PIN;       // Int on falling edge (end of pkt)
TI_CC_GDO0_PxIFG &= ~TI_CC_GDO0_PIN;      // Clear flag
TI_CC_GDO0_PxIE |= TI_CC_GDO0_PIN;        // Enable int on end of packet

I hope you can help me. Thanks in advances

Gian Nicola

Hi Gian,

As a quick sanity check:  What is the Packet Automation control register set to?

0x08: PKTCTRL0 – Packet Automation Control

Specifically, bits 0 and 1:  Configure the Packet Length

The register description is on pdf page 65 in the data sheet.

As for the main question on the Status register, the main thing to consider is that is a 4 bit value.  2 EXP 4 is 16, so it only tells you the top of the FIFO (ie... if you had a packet length of 64, the value in the status register would not change until after you wrote byte # 49.

From the data sheet: 

the

FIFO_BYTES_AVAILABLE field contains the number of bytes that can be written to the TX FIFO. When FIFO_BYTES_AVAILABLE =15, 15 or more bytes are available/free.

Hi protagonist,

CC2500 was configured as following:

TI_CC_SPIWriteReg(TI_CC2500_IOCFG2,   0x0B);  // GDO2 output pin config.
TI_CC_SPIWriteReg(TI_CC2500_IOCFG0,   0x06);  // GDO0 output pin config.
TI_CC_SPIWriteReg(TI_CC2500_PKTLEN,   0xFF);  // Packet length.
TI_CC_SPIWriteReg(TI_CC2500_PKTCTRL1, 0x04);  // Packet automation control.
TI_CC_SPIWriteReg(TI_CC2500_PKTCTRL0, 0x05);  // Packet automation control.
TI_CC_SPIWriteReg(TI_CC2500_ADDR,     0x00);  // Device address.
TI_CC_SPIWriteReg(TI_CC2500_CHANNR,   0x00); // Channel number.
TI_CC_SPIWriteReg(TI_CC2500_FSCTRL1,  0x09); // Freq synthesizer control.
TI_CC_SPIWriteReg(TI_CC2500_FSCTRL0,  0x00); // Freq synthesizer control.
TI_CC_SPIWriteReg(TI_CC2500_FREQ2,    0x5D); // Freq control word, high byte
TI_CC_SPIWriteReg(TI_CC2500_FREQ1,    0x93); // Freq control word, mid byte.
TI_CC_SPIWriteReg(TI_CC2500_FREQ0,    0xB1); // Freq control word, low byte.
TI_CC_SPIWriteReg(TI_CC2500_MDMCFG4,  0x2D); // Modem configuration.
TI_CC_SPIWriteReg(TI_CC2500_MDMCFG3,  0x3B); // Modem configuration.
TI_CC_SPIWriteReg(TI_CC2500_MDMCFG2,  0x73); // Modem configuration.
TI_CC_SPIWriteReg(TI_CC2500_MDMCFG1,  0x22); // Modem configuration.
TI_CC_SPIWriteReg(TI_CC2500_MDMCFG0,  0xF8); // Modem configuration.
TI_CC_SPIWriteReg(TI_CC2500_DEVIATN,  0x01); // Modem dev (when FSK mod en)
TI_CC_SPIWriteReg(TI_CC2500_MCSM1 ,   0x3F); // MainRadio Cntrl State Machine
TI_CC_SPIWriteReg(TI_CC2500_MCSM0 ,   0x18); // MainRadio Cntrl State Machine
TI_CC_SPIWriteReg(TI_CC2500_FOCCFG,   0x1D); // Freq Offset Compens. Config
TI_CC_SPIWriteReg(TI_CC2500_BSCFG,    0x1C); //  Bit synchronization config.
TI_CC_SPIWriteReg(TI_CC2500_AGCCTRL2, 0xC7); // AGC control.
TI_CC_SPIWriteReg(TI_CC2500_AGCCTRL1, 0x00); // AGC control.
TI_CC_SPIWriteReg(TI_CC2500_AGCCTRL0, 0xB2); // AGC control.
TI_CC_SPIWriteReg(TI_CC2500_FREND1,   0xB6); // Front end RX configuration.
TI_CC_SPIWriteReg(TI_CC2500_FREND0,   0x10); // Front end RX configuration.
TI_CC_SPIWriteReg(TI_CC2500_FSCAL3,   0xEA); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CC2500_FSCAL2,   0x0A); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CC2500_FSCAL1,   0x00); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CC2500_FSCAL0,   0x11); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CC2500_FSTEST,   0x59); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CC2500_TEST2,    0x88); // Various test settings.
TI_CC_SPIWriteReg(TI_CC2500_TEST1,    0x31); // Various test settings.
TI_CC_SPIWriteReg(TI_CC2500_TEST0,    0x0B); // Various test settings.

In particular, PKTCTRL0 was set to handle variable packet lenghts. Ok, now i understand why FIFO_BYTES_AVAILABLE doesn't change (It was my fault, sorry).

So, on the base of this, I can say that FIFO is correctly filled. Now, If I change the status to STX, it will automatically start with transmission? indipendently from the fact that there is something listening or not? Why GDO0 doesn't change? I have no idea about what I can do to face this.

Gian,

Could you please post the working project, i still cannot get this **simple** code to work on my EZ430-RF2500 board.

regards

Rob

Hi Rob.

I have not anymore the basic code you need, Actually I used it as starting point to do other things. I'm too busy at the moment, but I will post the basic code in the next days.

Gian

Hi protagonist,

I downloaded cc2500_release.zip project, but I cannot compile it -- it looks like some of the files are missing. Basically, when I compile RF2500_Simple_TX_RX_Main.c  file I'm getting the following error:     Fatal Error[Pe005]: could not open source file "prototypes.h". Where is this file?

Thanks!