cc2500 data whitening code

Hello.

I have a DAC card that generates IQ data and I'm upconverting the output to RF to talk to the CC2500.  I've successfully implemented the C code for the CRC, FEC, and interleaving as described in the app note: "dn504_fec_swra113a.pdf" and can receive the message payloads with an ez430-RF2500T USB device.  I'm looking to try the data whitening feature, and have tried to implement C code for it, but have not been able to successfully decode any of the messages I transmit with a CC2500 with Dewhitening on.  Here's the C code that I think should implement the whitening along with the CRC, FEC, and interleaving from the app note mentioned above.  The CC2500 manual says the preamble and sync are not whitened, but that the payload and checksum bytes are whitened before the FEC and interleaving.  It says an entire byte is shifted in before XOR-ing with 8 of the 9 bits of the PN9 register.  I assume that the PN9 circuit undergoes 8 clock cycles for each byte that shifts in to be XOR-ed with the PN9 register contents.  I have tried flipping the bits in the input and output bytes before and after XOR-ing, but it still does not work.  I have also tried whitening the trellis termination that is appended in the FEC step, but this did not work either.  Can anyone shed some light on how to properly implement the data whitening in C code?

Thanks a lot!

void

EncodeAndInterleaveBits(uint8_t *input, uint16_t inlen, uint8_t *output, uint16_t *outlen)

{

uint8_t fecEncodeTable[] = {0, 3, 1, 2, 3, 0, 2, 1, 3, 0, 2, 1, 0, 3, 1, 2};

uint8_t fec[520];

uint8_t i, j;

uint16_t fecReg, fecOutput, pnseq, fb, inputNum, fecNum, checksum;

uint32_t intOutput;

inputNum = inlen;

// Generate CRC

//Init value for CRC calculation

for (i = 0; i < inlen; i++)

          checksum = culCalcCRC(input[i], checksum);

// CRC1

// CRC0

// Whiten data and checksum

if (checkBoxWhitenData->Checked)

{

          pnseq = 0xffff;

          for (i = 0; i < inlen + 2; i++)

          {

               for (j = 0; j < 8; j++)

               {

                    fb = (((0x0001 & pnseq) ^ ((0x0020 & pnseq) >> 5)) << 8) & 0x0100;

                    pnseq = (pnseq >> 1) & 0x00ff;

                    pnseq |= fb;

               }

               input[i] ^= (pnseq & 0x00ff);

          }

}

// Append Trellis Terminator

// FEC encode

for

(i = 0; i < fecNum; i++)

{

fecReg = (fecReg & 0x700) | (input[i] & 0xff);

fecOutput = 0;

for

(j = 0; j < 8; j++)

{

fecOutput = (fecOutput << 2) | fecEncodeTable[fecReg >> 7];

fecReg = (fecReg << 1) & 0x7ff;

}

fec[i * 2] = fecOutput >> 8;

fec[i * 2 + 1] = fecOutput & 0xff;

}

// Perform interleaving

for

(i = 0; i < fecNum * 2; i += 4)

{

intOutput = 0;

for

(j = 0; j < 4*4; j++)