CC1120, RSSI error

Avi W

Other Parts Discussed in Thread: CC1120, SIMPLICITI, CC1200

Hello,

I'm using CC1120, 4-GFSK, Rx filter BW 200, Symbol rate 100 (Configuration attached).
When I try to read with simpliciti 1.2.1 beta the rssi value is stuck on single value that doesn't change not matter how the actual RSSI changes.

Yet when using CC1120, 2-GFSK, Rx filter BW 100, Symbol rate 38.4(Configuration attached) the RSSI readings in Simpliciti 1.2.1 beta are OK, they change according to expected values.

The configuration attached:

//INFO: (the standard smartRf for 868MHz 200KBPS)868MHz, Rx filter BW 200, 4-GFSK, Symbol rate 100
#define SMARTRF_RADIO_CC1120
#define SMARTRF_SETTING_IOCFG3             0xB0
#define SMARTRF_SETTING_IOCFG2             0x06
#define SMARTRF_SETTING_IOCFG1             0xB0
#define SMARTRF_SETTING_IOCFG0             0x40
#define SMARTRF_SETTING_SYNC3              0x93
#define SMARTRF_SETTING_SYNC2              0x0B
#define SMARTRF_SETTING_SYNC1              0x51
#define SMARTRF_SETTING_SYNC0              0xDE
#define SMARTRF_SETTING_SYNC_CFG1          0x07
#define SMARTRF_SETTING_SYNC_CFG0          0x17
#define SMARTRF_SETTING_DEVIATION_M        0x53
#define SMARTRF_SETTING_MODCFG_DEV_E       0x2F
#define SMARTRF_SETTING_DCFILT_CFG         0x04
#define SMARTRF_SETTING_PREAMBLE_CFG1      0x18
#define SMARTRF_SETTING_PREAMBLE_CFG0      0x2A
#define SMARTRF_SETTING_FREQ_IF_CFG        0x00
#define SMARTRF_SETTING_IQIC               0x00
#define SMARTRF_SETTING_CHAN_BW            0x01
#define SMARTRF_SETTING_MDMCFG1            0x46
#define SMARTRF_SETTING_MDMCFG0            0x05
#define SMARTRF_SETTING_SYMBOL_RATE2       0xA9
#define SMARTRF_SETTING_SYMBOL_RATE1       0x99
#define SMARTRF_SETTING_SYMBOL_RATE0       0x99
#define SMARTRF_SETTING_AGC_REF            0x3C
#define SMARTRF_SETTING_AGC_CS_THR         0xEC
#define SMARTRF_SETTING_AGC_GAIN_ADJUST    0x00
#define SMARTRF_SETTING_AGC_CFG3           0x83
#define SMARTRF_SETTING_AGC_CFG2           0x60
#define SMARTRF_SETTING_AGC_CFG1           0xA9
#define SMARTRF_SETTING_AGC_CFG0           0xC0
#define SMARTRF_SETTING_FIFO_CFG           0x00
#define SMARTRF_SETTING_DEV_ADDR           0x00
#define SMARTRF_SETTING_SETTLING_CFG       0x03
#define SMARTRF_SETTING_FS_CFG             0x12
#define SMARTRF_SETTING_WOR_CFG1           0x08
#define SMARTRF_SETTING_WOR_CFG0           0x21
#define SMARTRF_SETTING_WOR_EVENT0_MSB     0x00
#define SMARTRF_SETTING_WOR_EVENT0_LSB     0x00
#define SMARTRF_SETTING_PKT_CFG2           0x04
#define SMARTRF_SETTING_PKT_CFG1           0x05
#define SMARTRF_SETTING_PKT_CFG0           0x20
#define SMARTRF_SETTING_RFEND_CFG1         0x0F
#define SMARTRF_SETTING_RFEND_CFG0         0x00
#define SMARTRF_SETTING_PA_CFG2            0x7F
#define SMARTRF_SETTING_PA_CFG1            0x56
#define SMARTRF_SETTING_PA_CFG0            0x01
#define SMARTRF_SETTING_PKT_LEN            0xFF
#define SMARTRF_SETTING_IF_MIX_CFG         0x00
#define SMARTRF_SETTING_FREQOFF_CFG        0x20
#define SMARTRF_SETTING_TOC_CFG            0x0A
#define SMARTRF_SETTING_MARC_SPARE         0x00
#define SMARTRF_SETTING_ECG_CFG            0x00
#define SMARTRF_SETTING_CFM_DATA_CFG       0x00
#define SMARTRF_SETTING_EXT_CTRL           0x01
#define SMARTRF_SETTING_RCCAL_FINE         0x00
#define SMARTRF_SETTING_RCCAL_COARSE       0x00
#define SMARTRF_SETTING_RCCAL_OFFSET       0x00
#define SMARTRF_SETTING_FREQOFF1           0x00
#define SMARTRF_SETTING_FREQOFF0           0x00
#define SMARTRF_SETTING_FREQ2              0x6C
#define SMARTRF_SETTING_FREQ1              0x80
#define SMARTRF_SETTING_FREQ0              0x00
#define SMARTRF_SETTING_IF_ADC2            0x02
#define SMARTRF_SETTING_IF_ADC1            0xA6
#define SMARTRF_SETTING_IF_ADC0            0x04
#define SMARTRF_SETTING_FS_DIG1            0x00
#define SMARTRF_SETTING_FS_DIG0            0x5F
#define SMARTRF_SETTING_FS_CAL3            0x00
#define SMARTRF_SETTING_FS_CAL2            0x20
#define SMARTRF_SETTING_FS_CAL1            0x40
#define SMARTRF_SETTING_FS_CAL0            0x0E
#define SMARTRF_SETTING_FS_CHP             0x28
#define SMARTRF_SETTING_FS_DIVTWO          0x03
#define SMARTRF_SETTING_FS_DSM1            0x00
#define SMARTRF_SETTING_FS_DSM0            0x33
#define SMARTRF_SETTING_FS_DVC1            0xFF
#define SMARTRF_SETTING_FS_DVC0            0x17
#define SMARTRF_SETTING_FS_LBI             0x00
#define SMARTRF_SETTING_FS_PFD             0x50
#define SMARTRF_SETTING_FS_PRE             0x6E
#define SMARTRF_SETTING_FS_REG_DIV_CML     0x14
#define SMARTRF_SETTING_FS_SPARE           0xAC
#define SMARTRF_SETTING_FS_VCO4            0x14
#define SMARTRF_SETTING_FS_VCO3            0x00
#define SMARTRF_SETTING_FS_VCO2            0x00
#define SMARTRF_SETTING_FS_VCO1            0x00
#define SMARTRF_SETTING_FS_VCO0            0xB4
#define SMARTRF_SETTING_GBIAS6             0x00
#define SMARTRF_SETTING_GBIAS5             0x02
#define SMARTRF_SETTING_GBIAS4             0x00
#define SMARTRF_SETTING_GBIAS3             0x00
#define SMARTRF_SETTING_GBIAS2             0x10
#define SMARTRF_SETTING_GBIAS1             0x00
#define SMARTRF_SETTING_GBIAS0             0x00
#define SMARTRF_SETTING_IFAMP              0x01
#define SMARTRF_SETTING_LNA                0x01
#define SMARTRF_SETTING_RXMIX              0x01
#define SMARTRF_SETTING_XOSC5              0x0E
#define SMARTRF_SETTING_XOSC4              0xA0
#define SMARTRF_SETTING_XOSC3              0x03
#define SMARTRF_SETTING_XOSC2              0x04
#define SMARTRF_SETTING_XOSC1              0x03
#define SMARTRF_SETTING_XOSC0              0x00
#define SMARTRF_SETTING_ANALOG_SPARE       0x00
#define SMARTRF_SETTING_PA_CFG3            0x00
#define SMARTRF_SETTING_WOR_TIME1          0x00
#define SMARTRF_SETTING_WOR_TIME0          0x00
#define SMARTRF_SETTING_WOR_CAPTURE1       0x00
#define SMARTRF_SETTING_WOR_CAPTURE0       0x00
#define SMARTRF_SETTING_BIST               0x00
#define SMARTRF_SETTING_DCFILTOFFSET_I1    0x00
#define SMARTRF_SETTING_DCFILTOFFSET_I0    0x00
#define SMARTRF_SETTING_DCFILTOFFSET_Q1    0x00
#define SMARTRF_SETTING_DCFILTOFFSET_Q0    0x00
#define SMARTRF_SETTING_IQIE_I1            0x00
#define SMARTRF_SETTING_IQIE_I0            0x00
#define SMARTRF_SETTING_IQIE_Q1            0x00
#define SMARTRF_SETTING_IQIE_Q0            0x00
#define SMARTRF_SETTING_RSSI1              0x80
#define SMARTRF_SETTING_RSSI0              0x00
#define SMARTRF_SETTING_MARCSTATE          0x41
#define SMARTRF_SETTING_LQI_VAL            0x00
#define SMARTRF_SETTING_PQT_SYNC_ERR       0xFF
#define SMARTRF_SETTING_DEM_STATUS         0x00
#define SMARTRF_SETTING_FREQOFF_EST1       0x00
#define SMARTRF_SETTING_FREQOFF_EST0       0x00
#define SMARTRF_SETTING_AGC_GAIN3          0x00
#define SMARTRF_SETTING_AGC_GAIN2          0xD1
#define SMARTRF_SETTING_AGC_GAIN1          0x00
#define SMARTRF_SETTING_AGC_GAIN0          0x3F
#define SMARTRF_SETTING_CFM_RX_DATA_OUT    0x00
#define SMARTRF_SETTING_CFM_TX_DATA_IN     0x00
#define SMARTRF_SETTING_ASK_SOFT_RX_DATA   0x30
#define SMARTRF_SETTING_RNDGEN             0x7F
#define SMARTRF_SETTING_MAGN2              0x00
#define SMARTRF_SETTING_MAGN1              0x00
#define SMARTRF_SETTING_MAGN0              0x00
#define SMARTRF_SETTING_ANG1               0x00
#define SMARTRF_SETTING_ANG0               0x00
#define SMARTRF_SETTING_CHFILT_I2          0x08
#define SMARTRF_SETTING_CHFILT_I1          0x00
#define SMARTRF_SETTING_CHFILT_I0          0x00
#define SMARTRF_SETTING_CHFILT_Q2          0x00
#define SMARTRF_SETTING_CHFILT_Q1          0x00
#define SMARTRF_SETTING_CHFILT_Q0          0x00
#define SMARTRF_SETTING_GPIO_STATUS        0x00
#define SMARTRF_SETTING_FSCAL_CTRL         0x01
#define SMARTRF_SETTING_PHASE_ADJUST       0x00
#define SMARTRF_SETTING_PARTNUMBER         0x00
#define SMARTRF_SETTING_PARTVERSION        0x00
#define SMARTRF_SETTING_SERIAL_STATUS      0x00
#define SMARTRF_SETTING_MODEM_STATUS1      0x01
#define SMARTRF_SETTING_MODEM_STATUS0      0x00
#define SMARTRF_SETTING_MARC_STATUS1       0x00
#define SMARTRF_SETTING_MARC_STATUS0       0x00
#define SMARTRF_SETTING_PA_IFAMP_TEST      0x00
#define SMARTRF_SETTING_FSRF_TEST          0x00
#define SMARTRF_SETTING_PRE_TEST           0x00
#define SMARTRF_SETTING_PRE_OVR            0x00
#define SMARTRF_SETTING_ADC_TEST           0x00
#define SMARTRF_SETTING_DVC_TEST           0x0B
#define SMARTRF_SETTING_ATEST              0x40
#define SMARTRF_SETTING_ATEST_LVDS         0x00
#define SMARTRF_SETTING_ATEST_MODE         0x00
#define SMARTRF_SETTING_XOSC_TEST1         0x3C
#define SMARTRF_SETTING_XOSC_TEST0         0x00
#define SMARTRF_SETTING_RXFIRST            0x00
#define SMARTRF_SETTING_TXFIRST            0x00
#define SMARTRF_SETTING_RXLAST             0x00
#define SMARTRF_SETTING_TXLAST             0x00
#define SMARTRF_SETTING_NUM_TXBYTES        0x00
#define SMARTRF_SETTING_NUM_RXBYTES        0x00
#define SMARTRF_SETTING_FIFO_NUM_TXBYTES   0x0F
#define SMARTRF_SETTING_FIFO_NUM_RXBYTES   0x00

//MISSING/CHANGES in smartRf vs simpliciti 1.2.1 beta:
#define SMARTRF_SETTING_IRQ0M              0x00  //  deprecated registers
#define SMARTRF_SETTING_IRQ0F              0x00  //  deprecated registers

#define SMARTRF_SETTING_DRATE2             SMARTRF_SETTING_SYMBOL_RATE2 //   -|
#define SMARTRF_SETTING_DRATE1             SMARTRF_SETTING_SYMBOL_RATE1 //    | (data rate = 38.4 kbps)
#define SMARTRF_SETTING_DRATE0             SMARTRF_SETTING_SYMBOL_RATE0 //   -|

#define SMARTRF_SETTING_RX_STATUS          SMARTRF_SETTING_MODEM_STATUS1
#define SMARTRF_SETTING_TX_STATUS          SMARTRF_SETTING_MODEM_STATUS0

#define SMARTRF_SETTING_SOFT_TX_DATA_CFG   SMARTRF_SETTING_CFM_DATA_CFG
#define SMARTRF_SETTING_SOFT_RX_DATA_OUT   SMARTRF_SETTING_CFM_RX_DATA_OUT
#define SMARTRF_SETTING_SOFT_TX_DATA_IN    SMARTRF_SETTING_CFM_TX_DATA_IN

over 11 years ago

0 TER over 11 years ago

TI__Guru**** 317180 points

Note that when using 4GFSK, 100ksps, the chip uses zero IF. The AGC is set in a way that the max RSSI reposted is -51 dBm. When you have tested this, have you tried with signals lower than this value?

0 Avi W over 11 years ago in reply to TER

Expert 1345 points

Thank you for your replay.
You are correct, is there a way to have RSSI value with dynamic link budget with max RSSI up to -95 dBm while still having Bit rate of 200kbps?

0 TER over 11 years ago in reply to Avi W

TI__Guru**** 317180 points

Not sure if I understand your question: The 200 kbps gives correct RSSI for an input level between -120 dBm and -51 dBm

0 Avi W over 11 years ago in reply to TER

Expert 1345 points

Sorry -
1. Can I have 200Kbps with shifted sensitivity from -95 to -25?

2. What will be the maximum throughput which will enable RSSI values from -95dBm to -25dBm (which configuration will you recommand?)

0 TA12012 over 11 years ago in reply to Avi W

TI__Mastermind 36395 points

Avi,

1) no

2) I suggest 50kbps (setting from SmartRF Studio). The variable that you are looking for is (FREQ_IF_CFG (0x000F)) it needs to non-zero for the radio to be able to make RSSI values above -51dBm.

Regards,
/TA

0 TER over 11 years ago in reply to TA12012

TI__Guru**** 317180 points

1) Note that even if the RSSI saturates at -51 dBm this does not mean that the front-end saturates at this level. If you sweep the input level from -95 dBm to -25 dBm sending packets the PER (Packet error rate) will be zero in entire range even when the RSSI saturates earlier.

0 Avi W over 11 years ago in reply to TER

Expert 1345 points

Thank you both for the input, based on your answers I've got the CC1120 in TRxEB test to work in 868MHz, 4-GFSK, Symbol rate 100Kbps.
Which gives the 200Kbps I needed.
I've tested the RSSI values and received values from -14 dBm to -84 dBm => more than I needed.

I guess you didn't mentioned this configuration for a reason..
Could you kindly review the configuration & let me know for some issues that might be in it that I'm not aware of?
The smartRF configuration file is attached:

#define SMARTRF_RADIO_CC1120
#define SMARTRF_SETTING_IOCFG3             0xB0
#define SMARTRF_SETTING_IOCFG2             0x06
#define SMARTRF_SETTING_IOCFG1             0xB0
#define SMARTRF_SETTING_IOCFG0             0x40
#define SMARTRF_SETTING_SYNC3              0x93
#define SMARTRF_SETTING_SYNC2              0x0B
#define SMARTRF_SETTING_SYNC1              0x51
#define SMARTRF_SETTING_SYNC0              0xDE
#define SMARTRF_SETTING_SYNC_CFG1          0x08
#define SMARTRF_SETTING_SYNC_CFG0          0x17
#define SMARTRF_SETTING_DEVIATION_M        0x99
#define SMARTRF_SETTING_MODCFG_DEV_E       0x2D
#define SMARTRF_SETTING_DCFILT_CFG         0x15
#define SMARTRF_SETTING_PREAMBLE_CFG1      0x18
#define SMARTRF_SETTING_PREAMBLE_CFG0      0x2A
#define SMARTRF_SETTING_FREQ_IF_CFG        0x3A
#define SMARTRF_SETTING_IQIC               0x00
#define SMARTRF_SETTING_CHAN_BW            0x01
#define SMARTRF_SETTING_MDMCFG1            0x46
#define SMARTRF_SETTING_MDMCFG0            0x05
#define SMARTRF_SETTING_SYMBOL_RATE2       0xA9
#define SMARTRF_SETTING_SYMBOL_RATE1       0x99
#define SMARTRF_SETTING_SYMBOL_RATE0       0x9A
#define SMARTRF_SETTING_AGC_REF            0x3C
#define SMARTRF_SETTING_AGC_CS_THR         0xEF
#define SMARTRF_SETTING_AGC_GAIN_ADJUST    0x00
#define SMARTRF_SETTING_AGC_CFG3           0x91
#define SMARTRF_SETTING_AGC_CFG2           0x20
#define SMARTRF_SETTING_AGC_CFG1           0xA9
#define SMARTRF_SETTING_AGC_CFG0           0xC0
#define SMARTRF_SETTING_FIFO_CFG           0x00
#define SMARTRF_SETTING_DEV_ADDR           0x00
#define SMARTRF_SETTING_SETTLING_CFG       0x03
#define SMARTRF_SETTING_FS_CFG             0x12
#define SMARTRF_SETTING_WOR_CFG1           0x08
#define SMARTRF_SETTING_WOR_CFG0           0x21
#define SMARTRF_SETTING_WOR_EVENT0_MSB     0x00
#define SMARTRF_SETTING_WOR_EVENT0_LSB     0x00
#define SMARTRF_SETTING_PKT_CFG2           0x04
#define SMARTRF_SETTING_PKT_CFG1           0x05
#define SMARTRF_SETTING_PKT_CFG0           0x20
#define SMARTRF_SETTING_RFEND_CFG1         0x0F
#define SMARTRF_SETTING_RFEND_CFG0         0x00
#define SMARTRF_SETTING_PA_CFG2            0x43
#define SMARTRF_SETTING_PA_CFG1            0x56
#define SMARTRF_SETTING_PA_CFG0            0x7A
#define SMARTRF_SETTING_PKT_LEN            0xFF
#define SMARTRF_SETTING_IF_MIX_CFG         0x00
#define SMARTRF_SETTING_FREQOFF_CFG        0x20
#define SMARTRF_SETTING_TOC_CFG            0x0A
#define SMARTRF_SETTING_MARC_SPARE         0x00
#define SMARTRF_SETTING_ECG_CFG            0x00
#define SMARTRF_SETTING_CFM_DATA_CFG       0x00
#define SMARTRF_SETTING_EXT_CTRL           0x01
#define SMARTRF_SETTING_RCCAL_FINE         0x00
#define SMARTRF_SETTING_RCCAL_COARSE       0x00
#define SMARTRF_SETTING_RCCAL_OFFSET       0x00
#define SMARTRF_SETTING_FREQOFF1           0x00
#define SMARTRF_SETTING_FREQOFF0           0x00
#define SMARTRF_SETTING_FREQ2              0x6C
#define SMARTRF_SETTING_FREQ1              0x80
#define SMARTRF_SETTING_FREQ0              0x00
#define SMARTRF_SETTING_IF_ADC2            0x02
#define SMARTRF_SETTING_IF_ADC1            0xA6
#define SMARTRF_SETTING_IF_ADC0            0x04
#define SMARTRF_SETTING_FS_DIG1            0x00
#define SMARTRF_SETTING_FS_DIG0            0x5F
#define SMARTRF_SETTING_FS_CAL3            0x00
#define SMARTRF_SETTING_FS_CAL2            0x20
#define SMARTRF_SETTING_FS_CAL1            0x40
#define SMARTRF_SETTING_FS_CAL0            0x0E
#define SMARTRF_SETTING_FS_CHP             0x28
#define SMARTRF_SETTING_FS_DIVTWO          0x03
#define SMARTRF_SETTING_FS_DSM1            0x00
#define SMARTRF_SETTING_FS_DSM0            0x33
#define SMARTRF_SETTING_FS_DVC1            0xFF
#define SMARTRF_SETTING_FS_DVC0            0x17
#define SMARTRF_SETTING_FS_LBI             0x00
#define SMARTRF_SETTING_FS_PFD             0x50
#define SMARTRF_SETTING_FS_PRE             0x6E
#define SMARTRF_SETTING_FS_REG_DIV_CML     0x14
#define SMARTRF_SETTING_FS_SPARE           0xAC
#define SMARTRF_SETTING_FS_VCO4            0x14
#define SMARTRF_SETTING_FS_VCO3            0x00
#define SMARTRF_SETTING_FS_VCO2            0x00
#define SMARTRF_SETTING_FS_VCO1            0x00
#define SMARTRF_SETTING_FS_VCO0            0xB4
#define SMARTRF_SETTING_GBIAS6             0x00
#define SMARTRF_SETTING_GBIAS5             0x02
#define SMARTRF_SETTING_GBIAS4             0x00
#define SMARTRF_SETTING_GBIAS3             0x00
#define SMARTRF_SETTING_GBIAS2             0x10
#define SMARTRF_SETTING_GBIAS1             0x00
#define SMARTRF_SETTING_GBIAS0             0x00
#define SMARTRF_SETTING_IFAMP              0x01
#define SMARTRF_SETTING_LNA                0x01
#define SMARTRF_SETTING_RXMIX              0x01
#define SMARTRF_SETTING_XOSC5              0x0E
#define SMARTRF_SETTING_XOSC4              0xA0
#define SMARTRF_SETTING_XOSC3              0x03
#define SMARTRF_SETTING_XOSC2              0x04
#define SMARTRF_SETTING_XOSC1              0x03
#define SMARTRF_SETTING_XOSC0              0x00
#define SMARTRF_SETTING_ANALOG_SPARE       0x00
#define SMARTRF_SETTING_PA_CFG3            0x00
#define SMARTRF_SETTING_WOR_TIME1          0x00
#define SMARTRF_SETTING_WOR_TIME0          0x00
#define SMARTRF_SETTING_WOR_CAPTURE1       0x00
#define SMARTRF_SETTING_WOR_CAPTURE0       0x00
#define SMARTRF_SETTING_BIST               0x00
#define SMARTRF_SETTING_DCFILTOFFSET_I1    0x00
#define SMARTRF_SETTING_DCFILTOFFSET_I0    0x00
#define SMARTRF_SETTING_DCFILTOFFSET_Q1    0x00
#define SMARTRF_SETTING_DCFILTOFFSET_Q0    0x00
#define SMARTRF_SETTING_IQIE_I1            0x00
#define SMARTRF_SETTING_IQIE_I0            0x00
#define SMARTRF_SETTING_IQIE_Q1            0x00
#define SMARTRF_SETTING_IQIE_Q0            0x00
#define SMARTRF_SETTING_RSSI1              0x80
#define SMARTRF_SETTING_RSSI0              0x00
#define SMARTRF_SETTING_MARCSTATE          0x41
#define SMARTRF_SETTING_LQI_VAL            0x00
#define SMARTRF_SETTING_PQT_SYNC_ERR       0xFF
#define SMARTRF_SETTING_DEM_STATUS         0x00
#define SMARTRF_SETTING_FREQOFF_EST1       0x00
#define SMARTRF_SETTING_FREQOFF_EST0       0x00
#define SMARTRF_SETTING_AGC_GAIN3          0x00
#define SMARTRF_SETTING_AGC_GAIN2          0xD1
#define SMARTRF_SETTING_AGC_GAIN1          0x00
#define SMARTRF_SETTING_AGC_GAIN0          0x3F
#define SMARTRF_SETTING_CFM_RX_DATA_OUT    0x00
#define SMARTRF_SETTING_CFM_TX_DATA_IN     0x00
#define SMARTRF_SETTING_ASK_SOFT_RX_DATA   0x30
#define SMARTRF_SETTING_RNDGEN             0x7F
#define SMARTRF_SETTING_MAGN2              0x00
#define SMARTRF_SETTING_MAGN1              0x00
#define SMARTRF_SETTING_MAGN0              0x00
#define SMARTRF_SETTING_ANG1               0x00
#define SMARTRF_SETTING_ANG0               0x00
#define SMARTRF_SETTING_CHFILT_I2          0x08
#define SMARTRF_SETTING_CHFILT_I1          0x00
#define SMARTRF_SETTING_CHFILT_I0          0x00
#define SMARTRF_SETTING_CHFILT_Q2          0x00
#define SMARTRF_SETTING_CHFILT_Q1          0x00
#define SMARTRF_SETTING_CHFILT_Q0          0x00
#define SMARTRF_SETTING_GPIO_STATUS        0x00
#define SMARTRF_SETTING_FSCAL_CTRL         0x01
#define SMARTRF_SETTING_PHASE_ADJUST       0x00
#define SMARTRF_SETTING_PARTNUMBER         0x48
#define SMARTRF_SETTING_PARTVERSION        0x21
#define SMARTRF_SETTING_SERIAL_STATUS      0x00
#define SMARTRF_SETTING_MODEM_STATUS1      0x10
#define SMARTRF_SETTING_MODEM_STATUS0      0x00
#define SMARTRF_SETTING_MARC_STATUS1       0x00
#define SMARTRF_SETTING_MARC_STATUS0       0x00
#define SMARTRF_SETTING_PA_IFAMP_TEST      0x00
#define SMARTRF_SETTING_FSRF_TEST          0x00
#define SMARTRF_SETTING_PRE_TEST           0x00
#define SMARTRF_SETTING_PRE_OVR            0x00
#define SMARTRF_SETTING_ADC_TEST           0x00
#define SMARTRF_SETTING_DVC_TEST           0x0B
#define SMARTRF_SETTING_ATEST              0x40
#define SMARTRF_SETTING_ATEST_LVDS         0x00
#define SMARTRF_SETTING_ATEST_MODE         0x00
#define SMARTRF_SETTING_XOSC_TEST1         0x3C
#define SMARTRF_SETTING_XOSC_TEST0         0x00
#define SMARTRF_SETTING_RXFIRST            0x00
#define SMARTRF_SETTING_TXFIRST            0x00
#define SMARTRF_SETTING_RXLAST             0x00
#define SMARTRF_SETTING_TXLAST             0x00
#define SMARTRF_SETTING_NUM_TXBYTES        0x00
#define SMARTRF_SETTING_NUM_RXBYTES        0x00
#define SMARTRF_SETTING_FIFO_NUM_TXBYTES   0x0F
#define SMARTRF_SETTING_FIFO_NUM_RXBYTES   0x00

0 TER over 11 years ago in reply to Avi W

TI__Guru**** 317180 points

I tested this setting and I got a fair amount of residual BER for levels above ~-30 dBm. It worked better with the deviation set to 50 kHz. I have to look closer to see if it's possible to get it more optimal.

Any reason you are using CC1120 vs CC1200?

0 Avi W over 11 years ago in reply to TER

Expert 1345 points

Thank you for your test & replay :)

Well we have based our prototype on the TRxEB board with the CC1120, in future generations we might switch to other transceivers yet for now we have manufactured our boards with the CC1120 so for now we will work with it.

If you have a better configuration please let me know so I could update it in our solution.

Sub-1 GHz

Sub-1 GHz forum

CC1120, RSSI error