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CC1120, OOK transparent mode, RSSI in SmartRF different than read from chip

Aleksander Miera
Prodigy 60 points
Other Parts Discussed in Thread: CC1120

Hello,


My problem  is pretty much described in post's topic:
 I'm trying to use CC1120 transparent mode to receive some obsolete 433 MHz 9600 baud OOK  transmission. Receiver works pretty much ok, but I would also like to measure the signal's RSSI. And that's where the problems start: SmartRF studio displays values ca. -40 dBm, while reading RSSI register (I wrote a simple software for TrxEB) shows only noise, sometimes some slopes sligtlhy (ca. 5dBm) over the noise floor. All this happens with the same register settings in both C code and the Studio. Question is - what might be wrong? The MSP430 program seems ok, as it measures the RSSI for 868 FSK modulated signal correctly.

The procedure is really simple: init regs, send SRX strobe, poll RSSI register in a loop.


Register config can be seen below:

  {CC112X_IOCFG3,              0xB0},
  {CC112X_IOCFG2,              0x08},
  {CC112X_IOCFG1,              0xB0},
  {CC112X_IOCFG0,              0x09},
  {CC112X_SYNC3,               0xAA},
  {CC112X_SYNC2,               0xAA},
  {CC112X_SYNC1,               0xAA},
  {CC112X_SYNC0,               0xAA},
  {CC112X_SYNC_CFG1,           0x0B},
  {CC112X_SYNC_CFG0,           0x17},
  {CC112X_DEVIATION_M,         0x06},
  {CC112X_MODCFG_DEV_E,        0x1B},
  //{CC112X_DCFILT_CFG,          0x1C},
  {CC112X_DCFILT_CFG,          0x5C},
  {CC112X_PREAMBLE_CFG1,       0x00},
  {CC112X_PREAMBLE_CFG0,       0x2A},
  {CC112X_FREQ_IF_CFG,         0x40},
  {CC112X_IQIC,                0x46},
  {CC112X_CHAN_BW,             0x02},
  {CC112X_MDMCFG1,             0x06},
  {CC112X_MDMCFG0,             0x0A},
  {CC112X_SYMBOL_RATE2,        0x43},
  {CC112X_SYMBOL_RATE1,        0xA9},
  {CC112X_SYMBOL_RATE0,        0x2A},
  {CC112X_AGC_REF,             0x20},
  {CC112X_AGC_CS_THR,          0x19},
  {CC112X_AGC_GAIN_ADJUST,     0x00},
  {CC112X_AGC_CFG3,            0x91},
  {CC112X_AGC_CFG2,            0x20},
  //{CC112X_AGC_CFG1,            0x0A},
  {CC112X_AGC_CFG1,            0x00},
  //{CC112X_AGC_CFG0,            0xC7},
  {CC112X_AGC_CFG0,            0xC3},
  {CC112X_FIFO_CFG,            0x00},
  {CC112X_DEV_ADDR,            0x00},
  {CC112X_SETTLING_CFG,        0x03},
  {CC112X_FS_CFG,              0x14},
  {CC112X_WOR_CFG1,            0x08},
  {CC112X_WOR_CFG0,            0x21},
  {CC112X_WOR_EVENT0_MSB,      0x00},
  {CC112X_WOR_EVENT0_LSB,      0x00},
  {CC112X_PKT_CFG2,            0x05},
  {CC112X_PKT_CFG1,            0x00},
  {CC112X_PKT_CFG0,            0x20},
  {CC112X_RFEND_CFG1,          0x0F},
  {CC112X_RFEND_CFG0,          0x00},
  {CC112X_PA_CFG2,             0x7C},
  {CC112X_PA_CFG1,             0x56},
  {CC112X_PA_CFG0,             0x7C},
  {CC112X_PKT_LEN,             0x03},
  {CC112X_IF_MIX_CFG,          0x00},
  {CC112X_FREQOFF_CFG,         0x22},
  {CC112X_TOC_CFG,             0x0B},
  {CC112X_MARC_SPARE,          0x00},
  {CC112X_ECG_CFG,             0x00},
  {CC112X_CFM_DATA_CFG,        0x00},
  {CC112X_EXT_CTRL,            0x01},
  {CC112X_RCCAL_FINE,          0x00},
  {CC112X_RCCAL_COARSE,        0x00},
  {CC112X_RCCAL_OFFSET,        0x00},
  {CC112X_FREQOFF1,            0x00},
  {CC112X_FREQOFF0,            0x00},
  {CC112X_FREQ2,               0x6C},
  //{CC112X_FREQ1,               0x7B},
  {CC112X_FREQ1,               0x7A},
  //{CC112X_FREQ0,               0x33},
  {CC112X_FREQ0,               0x1C},
  {CC112X_IF_ADC2,             0x02},
  {CC112X_IF_ADC1,             0xA6},
  {CC112X_IF_ADC0,             0x04},
  {CC112X_FS_DIG1,             0x00},
  {CC112X_FS_DIG0,             0x5F},
  {CC112X_FS_CAL3,             0x00},
  {CC112X_FS_CAL2,             0x20},
  {CC112X_FS_CAL1,             0x40},
  {CC112X_FS_CAL0,             0x0E},
  {CC112X_FS_CHP,              0x28},
  {CC112X_FS_DIVTWO,           0x03},
  {CC112X_FS_DSM1,             0x00},
  {CC112X_FS_DSM0,             0x33},
  {CC112X_FS_DVC1,             0xFF},
  {CC112X_FS_DVC0,             0x17},
  {CC112X_FS_LBI,              0x00},
  {CC112X_FS_PFD,              0x50},
  {CC112X_FS_PRE,              0x6E},
  {CC112X_FS_REG_DIV_CML,      0x14},
  {CC112X_FS_SPARE,            0xAC},
  {CC112X_FS_VCO4,             0x14},
  {CC112X_FS_VCO3,             0x00},
  {CC112X_FS_VCO2,             0x00},
  {CC112X_FS_VCO1,             0x00},
  {CC112X_FS_VCO0,             0xB4},
  {CC112X_GBIAS6,              0x00},
  {CC112X_GBIAS5,              0x02},
  {CC112X_GBIAS4,              0x00},
  {CC112X_GBIAS3,              0x00},
  {CC112X_GBIAS2,              0x10},
  {CC112X_GBIAS1,              0x00},
  {CC112X_GBIAS0,              0x00},
  {CC112X_IFAMP,               0x01},
  {CC112X_LNA,                 0x01},
  {CC112X_RXMIX,               0x01},
  {CC112X_XOSC5,               0x0E},
  {CC112X_XOSC4,               0xA0},
  {CC112X_XOSC3,               0x03},
  {CC112X_XOSC2,               0x04},
  {CC112X_XOSC1,               0x03},
  {CC112X_XOSC0,               0x00},
  {CC112X_ANALOG_SPARE,        0x00},
  {CC112X_PA_CFG3,             0x00},
  {CC112X_WOR_TIME1,           0x00},
  {CC112X_WOR_TIME0,           0x00},
  {CC112X_WOR_CAPTURE1,        0x00},
  {CC112X_WOR_CAPTURE0,        0x00},
  {CC112X_BIST,                0x00},
  {CC112X_DCFILTOFFSET_I1,     0x00},
  {CC112X_DCFILTOFFSET_I0,     0x00},
  {CC112X_DCFILTOFFSET_Q1,     0x00},
  {CC112X_DCFILTOFFSET_Q0,     0x00},
  {CC112X_IQIE_I1,             0x00},
  {CC112X_IQIE_I0,             0x00},
  {CC112X_IQIE_Q1,             0x00},
  {CC112X_IQIE_Q0,             0x00},
  {CC112X_RSSI1,               0x80},
  {CC112X_RSSI0,               0x00},
  {CC112X_MARCSTATE,           0x41},
  {CC112X_LQI_VAL,             0x00},
  {CC112X_PQT_SYNC_ERR,        0xFF},
  {CC112X_DEM_STATUS,          0x00},
  {CC112X_FREQOFF_EST1,        0x00},
  {CC112X_FREQOFF_EST0,        0x00},
  {CC112X_AGC_GAIN3,           0x00},
  {CC112X_AGC_GAIN2,           0xD1},
  {CC112X_AGC_GAIN1,           0x00},
  {CC112X_AGC_GAIN0,           0x3F},
  {CC112X_CFM_RX_DATA_OUT,     0x00},
  {CC112X_CFM_TX_DATA_IN,      0x00},
  {CC112X_ASK_SOFT_RX_DATA,    0x30},
  {CC112X_RNDGEN,              0x7F},
  {CC112X_MAGN2,               0x00},
  {CC112X_MAGN1,               0x00},
  {CC112X_MAGN0,               0x00},
  {CC112X_ANG1,                0x00},
  {CC112X_ANG0,                0x00},
  {CC112X_CHFILT_I2,           0x08},
  {CC112X_CHFILT_I1,           0x00},
  {CC112X_CHFILT_I0,           0x00},
  {CC112X_CHFILT_Q2,           0x00},
  {CC112X_CHFILT_Q1,           0x00},
  {CC112X_CHFILT_Q0,           0x00},
  {CC112X_GPIO_STATUS,         0x00},
  {CC112X_FSCAL_CTRL,          0x01},
  {CC112X_PHASE_ADJUST,        0x00},
  {CC112X_PARTNUMBER,          0x48},
  {CC112X_PARTVERSION,         0x21},
  {CC112X_SERIAL_STATUS,       0x08},
  {CC112X_MODEM_STATUS1,       0x10},
  {CC112X_MODEM_STATUS0,       0x00},
  {CC112X_MARC_STATUS1,        0x00},
  {CC112X_MARC_STATUS0,        0x00},
  {CC112X_PA_IFAMP_TEST,       0x00},
  {CC112X_FSRF_TEST,           0x00},
  {CC112X_PRE_TEST,            0x00},
  {CC112X_PRE_OVR,             0x00},
  {CC112X_ADC_TEST,            0x00},
  {CC112X_DVC_TEST,            0x0B},
  {CC112X_ATEST,               0x40},
  {CC112X_ATEST_LVDS,          0x00},
  {CC112X_ATEST_MODE,          0x00},
  {CC112X_XOSC_TEST1,          0x3C},
  {CC112X_XOSC_TEST0,          0x00},
  {CC112X_RXFIRST,             0x00},
  {CC112X_TXFIRST,             0x00},
  {CC112X_RXLAST,              0x00},
  {CC112X_TXLAST,              0x00},
  {CC112X_NUM_TXBYTES,         0x00},
  {CC112X_NUM_RXBYTES,         0x00},
  {CC112X_FIFO_NUM_TXBYTES,    0x0F},
  {CC112X_FIFO_NUM_RXBYTES,    0x00},

Regards,

Aleksander

  • 0
    TI__Mastermind 39860 points

    The data rate is 1.2 kbp. The RX filter BW = 100 kHz and AGC_CFG1 = 0x0. These factors determine the RSSI update rate (see design note DN501, www.ti.com/lit/swra413). It could be that the RSSI update rate is too fast for the 1.2 kbps data rate. Try to slow down the RSSI update rate. Set AGC_CFG1 = 0xB1 or 0xB5. Lower RX will also help, but I assume you need this due to a large frequency tolerance on the TX side (old legacy system?)

  • 0
    TI__Guru**** 317180 points

    Studio reads the RSSI register so you should get the same result writing code as with SmartRF Studio. First, try to only set the registers you need to change, you are writing  to a lot of read only registers.

  • 0 in reply to TER
    Prodigy 60 points

    Tried that

     

    {CC1120_IOCFG3, 0xB0},

    {CC1120_IOCFG2, 0x08},

    {CC1120_IOCFG1, 0xB0},

    {CC1120_IOCFG0, 0x09},

    {CC1120_SYNC3, 0xAA},

    {CC1120_SYNC2, 0xAA},

    {CC1120_SYNC1, 0xAA},

    {CC1120_SYNC0, 0xAA},

    {CC1120_SYNC_CFG1, 0x1F},

    {CC1120_DEVIATION_M, 0x26},

    {CC1120_MODCFG_DEV_E, 0x1D},

    {CC1120_DCFILT_CFG, 0x13},

    {CC1120_PREAMBLE_CFG1, 0x00},

    {CC1120_PREAMBLE_CFG0, 0x33},

    {CC1120_IQIC, 0x00},

    {CC1120_CHAN_BW, 0x02},

    {CC1120_MDMCFG1, 0x26},

    {CC1120_MDMCFG0, 0x4A},

    {CC1120_AGC_REF, 0x30},

    {CC1120_AGC_CS_THR, 0xEC},

    {CC1120_AGC_CFG3, 0xD1},

    {CC1120_AGC_CFG2, 0x3F},

    {CC1120_AGC_CFG1, 0x0A},

    {CC1120_AGC_CFG0, 0x9F},

    {CC1120_FIFO_CFG, 0x00},

    {CC1120_SETTLING_CFG, 0x03},

    {CC1120_FS_CFG, 0x14},

    {CC1120_PKT_CFG2, 0x07},

    {CC1120_PKT_CFG1, 0x00},

    {CC1120_PKT_CFG0, 0x20},

    {CC1120_PA_CFG2, 0x3C},

    {CC1120_PA_CFG0, 0x7E},

    {CC1120_IF_MIX_CFG, 0x00},

    {CC1120_FREQOFF_CFG, 0x22},

    {CC1120_TOC_CFG, 0x0A},

    {CC1120_FREQ2, 0x6C},

    {CC1120_FREQ1, 0x7B},

    {CC1120_FREQ0, 0x33},

    {CC1120_FS_DIG1, 0x00},

    {CC1120_FS_DIG0, 0x5F},

    {CC1120_FS_CAL1, 0x40},

    {CC1120_FS_CAL0, 0x0E},

    {CC1120_FS_DIVTWO, 0x03},

    {CC1120_FS_DSM0, 0x33},

    {CC1120_FS_DVC0, 0x17},

    {CC1120_FS_PFD, 0x50},

    {CC1120_FS_PRE, 0x6E},

    {CC1120_FS_REG_DIV_CML, 0x14},

    {CC1120_FS_SPARE, 0xAC},

    {CC1120_FS_VCO0, 0xB4},

    {CC1120_XOSC5, 0x0E},

    {CC1120_XOSC1, 0x03},

    {CC1120_PARTNUMBER, 0x48},

    {CC1120_PARTVERSION, 0x21},

    {CC1120_SERIAL_STATUS, 0x08},

    {CC1120_MODEM_STATUS1, 0x10},

     

    but still no luck, just noise, same with AGC config. Studio readouts are ok. What might be the reason?

     

    One more question:

    in case of using OOK with 90us min. pulse period is it even possible to effectively measure RSSI due to AGC settling times and short carrier presence?

  • 0 in reply to Aleksander Miera
    TI__Guru**** 317180 points

    Do you read the RSSI when the RSSI valid flag is set?

    See http://www.ti.com/lit/an/swra413/swra413.pdf to look at the RSSI timing. In the app note it is a link to a excel sheet where you can input your parameters and check the timing.