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CC1101 RX timeout needs to be >> PQT for reliable operation

STEVE ROGERS1
Prodigy 50 points
Other Parts Discussed in Thread: CC1101, TEST2

I'm currently designing a one-way radio link using CC1101 chips. The CC1101 receiver is seems to miss about 30% of the messages that are sent to it unless I make the rx_timeout >> PQT. This is with a strong (but not too strong) signal.

I am running the receiver in WOR mode with a period between receive pulses (EVENT0) of 170ms. The duration of the receive pulse when there are no transmissions present, (RX_TIMEOUT) is 2.65ms. I then have a transmission that has an large preamble of 180ms followed by 20ms of actual message. The data rate used is 4800 bits/second, operating frequency is 434 MHz, modulation is GFSK, data is whitened. PQT is set to 8 bits. 

The 2.65ms RX_timeout being used should have sufficient time for just over 12 bits of pre-amble which is more than the 8 bit PQT setting albeit only by a few bits.

I've found that reducing the PQT down to 4 bits really helps and reduces the missed messages to ~ 5%. If the RX timeout is doubled to around 5ms the receiver doesn't seem to miss any messages.

The results of my testing suggest that the CC1101 needs quite a lot more time than a few data bits above the PQT threshold before it will operate reliably. 

Thoughts?

Steve

  • 0
    TI__Guru**** 317180 points

    - Have you checked that EVENT0 is what you have programmed it to? 

    - Could you post your settings, at least the one related to WOR? 

  • 0 in reply to TER
    Prodigy 50 points

    Hi,

    Apologies for the delay I've been out of the office

    I've measured EVENT0 and it is as required.

    The settings that I was intending to use are below. .....

    // Rf settings for CC1101

    RF_SETTINGS code rfSettings = {
    0x06, // IOCFG0 GDO0 Output Pin Configuration
    0x47, // FIFOTHR RX FIFO and TX FIFO Thresholds
    0x48, // PKTCTRL1 Packet Automation Control
    0x06, // FSCTRL1 Frequency Synthesizer Control
    0x10, // FREQ2 Frequency Control Word, High Byte
    0xB1, // FREQ1 Frequency Control Word, Middle Byte
    0x3B, // FREQ0 Frequency Control Word, Low Byte
    0xC7, // MDMCFG4 Modem Configuration
    0x83, // MDMCFG3 Modem Configuration
    0x13, // MDMCFG2 Modem Configuration
    0x40, // DEVIATN Modem Deviation Setting
    0x0B, // MCSM2 Main Radio Control State Machine Configuration
    0x18, // MCSM0 Main Radio Control State Machine Configuration
    0x16, // FOCCFG Frequency Offset Compensation Configuration
    0x43, // AGCCTRL2 AGC Control
    0x18, // WOREVT1 High Byte Event0 Timeout
    0x30, // WOREVT0 Low Byte Event0 Timeout
    0x78, // WORCTRL Wake On Radio Control
    0xE9, // FSCAL3 Frequency Synthesizer Calibration
    0x2A, // FSCAL2 Frequency Synthesizer Calibration
    0x00, // FSCAL1 Frequency Synthesizer Calibration
    0x1F, // FSCAL0 Frequency Synthesizer Calibration
    0x50, // RCCTRL1 RC Oscillator Configuration
    0x15, // RCCTRL0 RC Oscillator Configuration
    0x81, // TEST2 Various Test Settings
    0x35, // TEST1 Various Test Settings
    0x09, // TEST0 Various Test Settings
    0x80, // RSSI Received Signal Strength Indication
    0x01, // MARCSTATE Main Radio Control State Machine State
    0x94, // VCO_VC_DAC Current Setting from PLL Calibration Module
    };

  • 0
    TI__Genius 12735 points

    Hi Steve

    Are you sure that the transmitter is sending preamble when the receiver enters RX so that there is a preamble on the air during the entire RX_TIMEOUT slot of 2.65 ms? If the transmitter starts sending preamble later out in the timeslot it might be that the receiver only gets ~4 bits before the timeout occurs.

    What happens if you set up the transmitter to continuously send a preamble?